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STPMIC25APQR Datasheet(PDF) 102 Page - STMicroelectronics |
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STPMIC25APQR Datasheet(HTML) 102 Page - STMicroelectronics |
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102 / 145 page ![]() 6.5.14 LDO4 ALTERNATE mode control register (LDO4_ALT_CR) Table 67. LDO4_ALT_CR 7 6 5 4 3 2 1 0 INPUT_SRC[1:0] reserved reserved reserved reserved reserved EN R/W R/W R R R R R R/W • Address: 0x56 • Default: 0b0000000X where X depends on the value programmed in the NVM • Description: LDO4 ALTERNATE mode control register. This register is initialized to the default value in the CHECK&LOAD state. The user can write to these registers to control enable or to force the power input source of LDO4, which is applied to the ALTERNATE mode (see Section 5.4.6). [7:6] INPUT_SRC[1:0]: force power input source 00: automatic input source selection (the higher voltage is automatically selected) 01: supply input source is VIN 10: supply input source is VBUS 11: automatic input source selection (the higher voltage is automatically selected) [5:1] reserved [0] EN: 0: LDO4 is disabled 1: LDO4 is enabled The default value is the same as LDO4_MAIN_CR STPMIC25 Register descriptions DS14278 - Rev 3 page 102/145 |
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