STPMIC25BPQR datasheet(71/145 Pages) STMICROELECTRONICS

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6.2.7

Overcurrent protection status register 2 (OCP_SR2)

OCP_LDO8

OCP_LDO7

OCP_LDO6

OCP_LDO5

OCP_LDO4

OCP_LDO3

OCP_LDO2

OCP_LDO1

•

Address: 0x06

•

Default: 0bxxxxxxxx where x depends on regulator that has triggered the OCP.

•

Description: If the PMIC is turned OFF or is restarted due to an OCP from a regulator, OCP_SR1 or

OCP_SR2 store the regulator instance that triggered the OCP.

The OCP_SR2 register is reset in the POWER_DOWN state. If an OCP hard-fault condition occurred, then the

OCP_SR2 register is set before leaving the POWER_DOWN state (see Section 5.4.9 and Section 5.4.4 and

Section 5.1.2).

[7]

OCP_LDO8: Last turn-off or restart is due to overcurrent protection on LDO8.

0: False

1: True

[6]

OCP_LDO7: Last turn-off or restart is due to overcurrent protection on LDO7.

0: False

1: True

[5]

OCP_LDO6: Last turn-off or restart is due to overcurrent protection on LDO6.

0: False

1: True

[4]

OCP_LDO5: Last turn-off or restart is due to overcurrent protection on LDO5.

0: False

1: True

[3]

OCP_LDO4: Last turn-off or restart is due to overcurrent protection on LDO4.

0: False

1: True

[2]

OCP_LDO3: Last turn-off or restart is due to overcurrent protection on LDO3.

0: False

1: True

[1]

OCP_LDO2: Last turn-off or restart is due to overcurrent protection on LDO2.

0: False

1: True

[0]

OCP_LDO1: Last turn-off or restart is due to overcurrent protection on LDO1.

0: False

1: True

STPMIC25

DS14278 - Rev 3

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