STPMIC25BPQR datasheet(85/145 Pages) STMICROELECTRONICS

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6.3.10

Buck pull-down control register 1 (BUCKS_PD_CR1)

Table 51. BUCKS_PD_CR1

BUCK4_PD[1:0]

BUCK3_PD[1:0]

BUCK2_PD[1:0]

BUCK1_PD[1:0]

R/W

•

Address: 0x19

•

Default: 0bXXXXXXXX where X depends on the value programmed in the NVM

•

Description: Bucks pull-down control register 1.

–

This register is initialized to the default value in the INIT&LOAD and in the CHECK&LOAD states.

[7:6]

BUCK4_PD[1:0]: BUCK4 pull-down selection.

00: no pull-down

01: slow pull-down active when BUCK4 is disabled (EN = 0)

10: fast pull-down active when BUCK4 is disabled (EN = 0)

11: slow pull-down forced active

[5:4]

BUCK3_PD[1:0]: BUCK3 pull-down selection.

00: no pull-down

01: slow pull-down active when BUCK3 is disabled (EN = 0)

10: fast pull-down active when BUCK3 is disabled (EN = 0)

11: slow pull-down forced active

[3:2]

BUCK2_PD[1:0]: BUCK2 pull-down selection.

00: no pull-down

01: slow pull-down active when BUCK2 is disabled (EN = 0)

10: fast pull-down active when BUCK2 is disabled (EN = 0)

11: slow pull-down forced active

[1:0]

BUCK1_PD[1:0]: BUCK1 pull-down selection.

00: no pull-down

01: slow pull-down active when BUCK1 is disabled (EN = 0)

10: fast pull-down active when BUCK1 is disabled (EN = 0)

11: slow pull-down forced active

STPMIC25

DS14278 - Rev 3

page 85/145

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