Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

STPMIC25BPQR Datasheet(PDF) 82 Page - STMicroelectronics

Part # STPMIC25BPQR
Description  Highly integrated power management IC for microprocessor units
PDF  145 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMIC25BPQR Datasheet(HTML) 82 Page - STMicroelectronics

Back Button STPMIC25BPQR Datasheet HTML 78Page - STMicroelectronics STPMIC25BPQR Datasheet HTML 79Page - STMicroelectronics STPMIC25BPQR Datasheet HTML 80Page - STMicroelectronics STPMIC25BPQR Datasheet HTML 81Page - STMicroelectronics STPMIC25BPQR Datasheet HTML 82Page - STMicroelectronics STPMIC25BPQR Datasheet HTML 83Page - STMicroelectronics STPMIC25BPQR Datasheet HTML 84Page - STMicroelectronics STPMIC25BPQR Datasheet HTML 85Page - STMicroelectronics STPMIC25BPQR Datasheet HTML 86Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 82 / 145 page
background image
6.3.7
Fail-safe overcurrent protection control register 1 (FS_OCP_CR1)
Table 48. FS_OCP_CR1
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
•
Address: 0x16
•
Default: 0xXX where X depends on the value programmed in the NVM
•
Description: Fail-safe overcurrent protection control register 1 (see Section 5.4.9). This register is initialized
to the default value in the CHECK&LOAD state.
[7]
FS_OCP_REFDDR: REFDDR OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[6]
FS_OCP_BUCK7: BUCK7 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[5]
FS_OCP_BUCK6: BUCK6 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[4]
FS_OCP_BUCK5: BUCK5 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[3]
FS_OCP_BUCK4: BUCK4 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[2]
FS_OCP_BUCK3: BUCK3 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[1]
FS_OCP_BUCK2: BUCK2 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[0]
FS_OCP_BUCK1: BUCK1 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
STPMIC25
Register descriptions
DS14278 - Rev 3
page 82/145



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com