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AD9172 Datasheet(PDF) 52 Page - Analog Devices

Part # AD9172
Description  Dual, 16-Bit, 12.6 GSPS RF DAC with Channelizers
PDF  146 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9172 Datasheet(HTML) 52 Page - Analog Devices

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Data Sheet
AD9172
DIGITAL DATAPATH
analog.com
Rev. C | 52 of 146
CHANNEL DIGITAL DATAPATH
Figure 65. Block Diagram of the Channel Digital Datapath per the Main DAC Output
Each main DAC output has three optional channelizers, or channel
datapaths, that are selected based on the JESD204B mode select-
ed. The channel datapaths also have the option to be bypassed
(1× interpolation selected), which bypasses all of the digital features
included in each channelizer. Each channelizer consists of a digital
gain stage, complex interpolation block, and complex 48-bit NCO
with modulus. The interpolation selection is the same for all three
channelizers; however, the gain stage and complex NCO values
can all be independently configured. The controls for these blocks
are paged by the channel paging mask in the CHANNEL_PAGE
bits (Register 0x008, Bits[5:0]), as described in Table 36. Each bit of
the page mask corresponds to a channel datapath. These channels
can be paged individually to set the values for each channel
uniquely, or can be paged simultaneously to set all channels to the
same value for the control being configured.
Table 36. Channel Page Mask
CHANNEL_PAGE
(Register 0x008,
Bits[5:0])
Channel Paged
Channel Datapath Updated
0x01 (Bit 0)
Channel 0
Channel 0 of DAC0
0x02 (Bit 1)
Channel 1
Channel 1 of DAC0
0x04 (Bit 2)
Channel 2
Channel 2 of DAC0
0x08 (Bit 3)
Channel 3
Channel 0 of DAC1
0x10 (Bit 4)
Channel 4
Channel 1 of DAC1
0x20 (Bit 5)
Channel 5
Channel 2 of DAC1
Each of the digital blocks in the channels is described in more detail
in the following sections.
Digital Gain
The AD9172 has individual channel gain controls that allow unique
gain scaling capabilities for each complex data input channel. The
gain code for each channel is 12-bit resolution, located in Register
0x146 and Register 0x147, and can be calculated by the following
formula:
0 ≤ Gain ≤ (212 − 1)/211
−∞ dB < dBGain ≤ +6.018 dB
Gain = Gain Code × (1/2048)
dBGain = 20 × log10 (Gain)
Gain Code = 2048 × Gain = 211 ×10(dBGain/20)
The gain code control (CHNL_GAIN) is paged with the channel
page mask (CHANNEL_PAGE) in Register 0x008, Bits[5:0]. The
digital gain feature is available in all modes, except when 1×
channel interpolation is used because the channel datapaths are
bypassed in that mode. The summing node that combines the three
channels may clip the summed signals if the combined amplitude
is too large. For example, if all three channels are being used and
all three data streams are >1/3 full-scale amplitude, clipping may
occur. The sum of the data values when any number of channels is
used must be between −215 and +215.
Channel Interpolation
The channel interpolation options available are bypass (1×), 2×, 3×,
4×, 6×, and 8×. Each of the half-band filters used for interpolation
has 80% bandwidths with 85 dB of stop band rejection. The chan-
nel half-band cascaded configuration is shown in Figure 66, with
each of the useable bandwidths of the channel interpolation filters
listed in Table 37.
Figure 66. Channel Interpolation Half-Band Filter Block Diagram
Table 37. Channel Interpolation Useable Bandwidths and Rejection
Half-Band Filter
Bandwidth (×fIN_FILTER)
(%)
Stop Band Rejection (dB)
HB0
80
85



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