AD9172 datasheet(96/146 Pages) AD

96 / 146 page

Data Sheet

AD9172

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Rev. C | 96 of 146

Table 60. Register Details

Addr.

Name

Bits

Bit Name

Settings

Description

Reset

Access

0x1

1×.

0x2

2×.

0x3

3×.

0x4

4×.

0x6

6×.

0x8

8×.

0x112

DDSM_DATAPATH_CFG [7:6]

RESERVED

Reserved.

0x0

[5:4]

DDSM_MODE

Modulator switch mode selection. This control

chooses the mode of operation for the main datapath

NCO being configured. This control is paged by the

MAINDAC_PAGE bits in Register 0x008.

0x0

R/W

DAC0 = I0; DAC1 = I1.

DAC0 = I0 + I1; DAC1 = Q0 + Q1.

DAC0 = I0; DAC1 = Q0.

DAC0 = I0 + I1; DAC1 = 0.

DDSM_NCO_EN

Main datapath modulation enable. If the JESD204B

mode chosen is a complex mode (main datapath

interpolation >1×), this bit must be set to 1 for

each main datapath being used. If no modulation is

desired, set the FTW to be 0. This control is paged by

the MAINDAC_PAGE bits in Register 0x008.

0x0

R/W

Disable main datapath NCO.

Enable main datapath NCO.

DDSM_

MODULUS_EN

Enable main datapath modulus DDS. This control

is paged by the MAINDAC_PAGE bits in Register

0x008.

0x0

R/W

Disable modulus DDS.

Enable modulus DDS.

DDSM_SEL_

SIDEBAND

Selects upper or lower sideband from modulation

result. This control is paged by the MAINDAC_PAGE

bits in Register 0x008.

0x0

R/W

Use upper sideband.

Use lower sideband = spectral flip.

EN_SYNC_ALL_

CHNL_NCO_RESETS

Selects the signal channel NCOS used for resets

and FTW updates. This control is paged by the

MAINDAC_PAGE bits in Register 0x008.

0x1

R/W

Channel NCOs reset or update their FTW based on

channel NCO update requests.

Channel NCOs reset or update their FTW based on

main datapath NCO update requests.

0x113

DDSM_FTW_

RESERVED

Reserved.

0x0

UPDATE

[6:4]

DDSM_FTW_REQ_

MODE

Frequency tuning word automatic update mode. This

control is paged by the MAINDAC_PAGE bits in

0x0

R/W

000

No automatic requests are generated when the FTW

registers are written.

001

Automatically generates a DDSM_FTW_

LOAD_REQ after DDSM_FTW Bits[7:0] are written.

010

Automatically generates a DDSM_FTW_

LOAD_REQ after DDSM_FTW Bits[15:8] are written.

011

Automatically generates a DDSM_FTW_

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