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AD9172 Datasheet(PDF) 90 Page - Analog Devices

Part # AD9172
Description  Dual, 16-Bit, 12.6 GSPS RF DAC with Channelizers
PDF  146 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9172 Datasheet(HTML) 90 Page - Analog Devices

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Data Sheet
AD9172
REGISTER DETAILS
analog.com
Rev. C | 90 of 146
Table 60. Register Details
Addr.
Name
Bits
Bit Name
Settings
Description
Reset
Access
4
MUX_SYSREF_JITTER
If EN_SYSREF_JITTER is set, this control chooses
the IRQx output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
3
MUX_DATA_READY
If EN_DATA_READY is set, this control chooses the
IRQx output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
2
MUX_LANE_FIFO
If EN_LANE_FIFO is set, this control chooses the
IRQx output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
1
MUX_PRBSQ
If EN_PRBSQ is set, this control chooses the IRQx
output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
0
MUX_PRBSI
If EN_PRBSI is set, this control chooses the IRQx
output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
0x029
IRQ_OUTPUT_MUX0
[7:4]
RESERVED
Reserved.
0x0
R
3
MUX_DAC0_CAL_
DONE
If EN_DAC0_CAL_DONE is set, this control chooses
the IRQx output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
[2:1]
RESERVED
Reserved.
0x0
R/W
0
MUX_PAERR0
If EN_PAERR0 is set, this control chooses the IRQx
output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
0x02A
IRQ_OUTPUT_MUX1
[7:4]
RESERVED
Reserved.
0x0
R
3
MUX_DAC1_CAL_
DONE
If EN_DAC1_CAL_DONE is set, this control chooses
the IRQx output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
[2:1]
RESERVED
Reserved.
0x0
R/W
0
MUX_PAERR1
If EN_PAERR1 is set, this control chooses the IRQx
output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
0x02B
IRQ_OUTPUT_MUX2
[7:6]
RESERVED
Reserved.
0x0
R
5
MUX_DLL_LOST
If EN_DLL_LOST is set, this control chooses the
IRQx output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
4
MUX_DLL_LOCK
If EN_DLL_LOCK is set, this control chooses the
IRQx output pin on which the event is triggered.
0x0
R/W
0
Route IRQ trigger signal to the IRQ0 pin.
1
Route IRQ trigger signal to the IRQ1 pin.
[3:2]
RESERVED
Reserved.
0x0
R/W



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