H838024 datasheet(327/697 Pages) RENESAS

327 / 697 page

Section 9 Timers

Rev. 7.00 Mar 10, 2005 page 285 of 652

REJ09B0042-0700

Timer Mode Register G (TMG)

OVFH

CCLR0

CKS1

CKS0

OVFL

OVIE

IIEGS

CCLR1

543210

0000000

R/(W)*

R/W

R/(W)*

R/W

Bit:

Initial value:

Read/Write:

Note: * Bits 7 and 6 can only be written with 0, for flag clearing.

TMG is an 8-bit read/write register that performs TCG clock selection from four internal clock

sources, counter clear selection, and edge selection for the input capture input signal interrupt

request, controls enabling of overflow interrupt requests, and also contains the overflow flags.

TMG is initialized to H'00 upon reset.

Bit 7—Timer Overflow Flag H (OVFH)

Bit 7 is a status flag indicating that TCG has overflowed from H'FF to H'00 when the input capture

input signal is high. This flag is set by hardware and cleared by software. It cannot be set by

software.

Bit 7

OVFH

Description

Clearing condition:

After reading OVFH = 1, cleared by writing 0 to OVFH

(initial value)

Setting condition:

Set when input capture input signal is high level and TCG overflows from H'FF to H'00

Bit 6—Timer Overflow Flag L (OVFL)

Bit 6 is a status flag indicating that TCG has overflowed from H'FF to H'00 when the input capture

input signal is low, or in interval operation. This flag is set by hardware and cleared by software.

It cannot be set by software.

Bit 6

OVFL

Description

Clearing condition:

After reading OVFL = 1, cleared by writing 0 to OVFL

(initial value)

Setting condition:

Set when TCG overflows from H'FF to H'00 while input capture input signal is high

level or during interval operation

H838024 Datasheet(PDF) 327 Page - Renesas Technology Corp

H838024 Datasheet(HTML) 327 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL