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PM5366 Datasheet(PDF) 193 Page - PMC-Sierra, Inc

Part # PM5366
Description  HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
PDF  267 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM5366 Datasheet(HTML) 193 Page - PMC-Sierra, Inc

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PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
181
Table 25
- DS3 Link Rate Information
Link Rate Octet
Bit #
7
6
5:4
3:0
DS3 Format
ALM
0 ClkRate[1:0]
Unused
Table 26
- DS3 Clock Rate Encoding
ClkRate[1:0]
DS3 Clocks / 2KHz
“00” – Nominal
22368
“01” – Fast
22372
“1x” – Slow
22364
SBI Alarms
The TEMAP-84 transfers alarm conditions across the SBI for T1, E1 and DS3
tributaries but not valid for transparent VTs.
Table 23 and Table 25 show the alarm indication bit, ALM, as bit 7 of the Link
Rate Octet. Devices connecting to the TEMAP-84 which do not support alarm
indications must set this bit to 0 on the SBI ADD bus.
The presence of an alarm condition is indicated by the ALM bit set high in the
Link Rate Octet. For T1 and E1 tributaries, either an out-of-frame condition or
Red alarm (persistent out-of-frame) may set the ALM as determined by the
IREDEN and IOOFEN per-tributary configuration bits. The absence of an alarm
condition is indicated by the ALM bit set low in the Link Rate Octet. In the egress
direction the TEMAP-84 can be configured to use the alarm bit to force AIS on a
per link basis by the EALMEN or EGRALMEN register bits.
T1 Tributary Mapping
Table 27 shows the format for mapping 84 T1s within the SPE octets. The DS0s
and framing bits within each T1 are easily located within this mapping for
SONET/SDH byte synchronously mapped T1 applications. Unframed T1s use
the exact same format for mapping 84 T1s into the SBI except that the T1
tributaries need not align with the frame bit and DS0 locations. The V1,V2 and
V4 octets are not used to carry T1 data and are either reserved or used for
control across the interface. When enabled, the V4 octet is the Link Rate octet
of Table 23. It carries alarm and clock phase information across the SBI bus.
The V1 and V2 octets are unused and should be ignored by devices listening to



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