PM8621 datasheet(26/184 Pages) PMC

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NSE-8G™ Standard Product Data Sheet

Preliminary

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

Document ID: PMC-2010850, Issue 1

Pad Name

Type

Pin No.

Function

TP[1]

TN[1]

TP[2]

TN[2]

TP[3]

TN[3]

TP[4]

TN[4]

TP[5]

TN[5]

TP[6]

TN[6]

TP[7]

TN[7]

TP[8]

TN[8]

TP[9]

TN[9]

TP[10]

TN[10]

TP[11]

TN[11]

TP[12]

TN[12]

Analog

LVDS

Output

AA2

AA3

Transmit Serial Data. The differential transmit working

serial data links (TP[11:0]/TN[11:0]) carry the transmit

SBI336S or SONET/SDH STS-12 frame data to a

downstream sinks in bit serial format. Each differential

pair carries a constituent STS-12 stream. Data on

TP[X]/TN[X] is encoded in an 8B/10B format extended

from IEEE Std. 802.3. The 8B/10B character bit ‘a’ is

transmitted first and the bit ‘j’ is transmitted last. All

TP[X]/TN[X] differential pairs are frequency locked and

phase aligned (within a certain tolerance) to each other.

TP[11:0]/TN[11:0] are nominally 777.6 Mbit/s data

streams.

NSE-8G Control and Clocking (5 Balls)

SYSCLK

Input

A16

System Clock. The system clock signal (SYSCLK) is the

master clock for the NSE-8G device. SYSCLK must be a

77.76 MHz clock, with a nominal 50% duty cycle.

CMP and RC1FP are sampled on the rising edge of

SYSCLK.

PM8621 Datasheet(PDF) 26 Page - PMC-Sierra, Inc

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