Electronic Components Datasheet Search
  English  ▼

X  

PM8621 Datasheet(PDF) 97 Page - PMC-Sierra, Inc

Part # PM8621
Description  NSE-8G??Standard Product Data Sheet Preliminary
PDF  184 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM8621 Datasheet(HTML) 97 Page - PMC-Sierra, Inc

Back Button PM8621 Datasheet HTML 93Page - PMC-Sierra, Inc PM8621 Datasheet HTML 94Page - PMC-Sierra, Inc PM8621 Datasheet HTML 95Page - PMC-Sierra, Inc PM8621 Datasheet HTML 96Page - PMC-Sierra, Inc PM8621 Datasheet HTML 97Page - PMC-Sierra, Inc PM8621 Datasheet HTML 98Page - PMC-Sierra, Inc PM8621 Datasheet HTML 99Page - PMC-Sierra, Inc PM8621 Datasheet HTML 100Page - PMC-Sierra, Inc PM8621 Datasheet HTML 101Page - PMC-Sierra, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 97 / 184 page
background image
NSE-8G™ Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
96
Document ID: PMC-2010850, Issue 1
Register 04DH: DCB Interrupt status Register.
Bit
Type
Function
Default
Bit 31-3
X
Unused
0
Bit 2
I
SWAPI
X
Bit 1
I
UPDATEI
X
Bit 0
I
FRAMEI
X
Writing to this register initiates copying of the active connection memory page to the offline
connection memory page. When a page swap is pending (SWAPV =’1’) writing to this register
may cause a corruption of the connection memory pages.
SWAPI
This bit reports and acknowledges a change of state in the SWAPV bit of the Configuration
register. This bit is cleared when this register is read. When enabled by SWAPE, the INT
output reflects the state of this bit.
UPDATEI
The offline page copy interrupt status bit, UPDATEI reports and acknowledges a change of
state from 1 to 0 in the UPDATEV bit of the Configuration register. This signifies that a page
copy is complete. This bit is cleared when read. When enabled by the UPDATEE bit, the INT
output reflects the state of this bit.
FRAMEI
The frame interrupt status bit reports the sampling of the CMP bit at the expected RC1FP
position. When enabled by FRAMEE, frequency of occurrence of FRAMEI is dependent on
MF_SWAP. When enabled by the FRAMEE bit, the INT output reflects the state of this bit.
MF_SWAP FRAMEI occurs every
00
1 frame
01
4 frame
10
4 frame
11
48 frame
This bit is cleared when read.
A change in the CMP input should be sequenced to occur as soon as possible after the
occurrence of FRAMEI. Changing CMP prior to the occurrence of FRAMEI may cause
unpredictable behavior as it may cause CMP to be sampled later than expected.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com