| Electronic Components Datasheet Search |
|
PM8621 Datasheet(PDF) 99 Page - PMC-Sierra, Inc |
|
|
|||||||||||||||||||||||||||||
PM8621 Datasheet(HTML) 99 Page - PMC-Sierra, Inc |
|
99 / 184 page ![]() NSE-8G™ Standard Product Data Sheet Preliminary Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 98 Document ID: PMC-2010850, Issue 1 OFAV The out-of-frame-alignment status bit (OFAV) reports the state of the frame alignment block in the R8TD block. OFAV is set high when the frame alignment block is in the out-of-frame- alignment state. OFAV is set low when the frame alignment block is in the in-frame- alignment state. OCAE The out of character alignment interrupt enable bit (OCAE) masks the contribution of the change of character alignment event indication bit (OCAI) in the R8TD block to INTB. When OCAE is high, INTB is asserted low when OCAI is high. INTB is not affected by the value of OCAI when OCAE is low. OFAE The out of frame alignment interrupt enable bit (OFAE) masks the contribution of the change of frame alignment event indication bit (OFAI) in the R8TD block to INTB. When OFAE is high, INTB is asserted low when OFAI is high. INTB is not affected by the value of OFAI when OFAE is low. LCVE The line code violation interrupt enable bit (LCVE) masks the contribution of the line code violation event indication bit (LCVI) in the R8TD block to INTB. When LCVE is high, INTB is asserted low when LCVI is high. INTB is not affected by the value of LCVI when LCVE is low. FUOE The FIFO underrun/overrun status interrupt enable bit (FUOE) masks the contribution of the FIFO underrun/overrun event indication bit (FUOI) in the R8TD block to INTB. When FUOE is high, INTB is asserted low when FUOI is high. INTB is not affected by the value of FUOI when FUOE is low. RXINV The receive data invert bit (RXINV) controls the active polarity of the incoming data stream. When RXINV is set high, the data is complemented before any processing by the R8TD. When RXINV is set low, data is not complemented before R8TD processing. Reserved[2:0] The Reserved[2:0] bits must be set to the indicated default value for correct operation of the NSE. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |