PM8621 datasheet(103/184 Pages) PMC

103 / 184 page

NSE-8G™ Standard Product Data Sheet

Preliminary

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

102

Document ID: PMC-2010850, Issue 1

Bit

Type

Function

Default

Bit 31:16

Unused

Bit 15

R/W

DRU_DTMSB

Bit 14

R/W

Reserved

Bit 13

R/W

DRU_ENB

Bit 12

R/W

RX_ENB

Bit 11

R/W

Reserved

Bit 10

R/W

A_RSTB

Bit 9

R/W

Reserved[4]

Bit 8

R/W

Reserved[3]

Bit 7

R/W

Reserved[2]

Bit 6

R/W

Reserved[1]

Bit 5

R/W

DRU_CTRL[3]

Bit 4

R/W

DRU_CTRL[2]

Bit 3

R/W

DRU_CTRL[1]

Bit 2

R/W

DRU_CTRL[0]

Bit 1

R/W

Reserved[0]

Bit 0

Unused

These registers drives the control signals for the RXLV and DRU blocks.

After Chip reset, this Register must be set to CC34h for proper operation, See below.

DRU_CTRL[3:0]

The DRU_CTRL[3:0] bits control the DRU CTRL[3:0] inputs. The DRU_CTRL[3:0] bus is

reset to 0000, but needs to be set to 1101 following a reset for correct operation of the

NSE.

A_RSTB

The A_RSTB bit is a soft-reset for the Data Recovery Unit Analog block. Setting A_RSTB to

logic 0 will reset the block.

Reserved

The Reserved bit is set to logic 0 on reset, but needs to be set to logic one following reset

for correct operation of the NSE.

PM8621 Datasheet(PDF) 103 Page - PMC-Sierra, Inc

PM8621 Datasheet(HTML) 103 Page - PMC-Sierra, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL