PM8621 datasheet(83/184 Pages) PMC

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NSE-8G™ Standard Product Data Sheet

Preliminary

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

Document ID: PMC-2010850, Issue 1

Bit

Type

Function

Default

Bit 31-16

Unused

Bit 15

R/W

Reserved[11]

Bit 14

R/W

Reserved[10]

Bit 13

R/W

Reserved[9]

Bit 12

R/W

Reserved[8]

Bit 11

R/W

Reserved[7]

Bit 10

R/W

Reserved[6]

Bit 9

R/W

Reserved[5]

Bit 8

R/W

Reserved[4]

Bit 7

R/W

Reserved[3]

Bit 6

R/W

Reserved[2]

Bit 5

R/W

Reserved[1]

Bit 4

R/W

CSU_ENB

Bit 3

R/W

CSU_RSTB

Bit 2

Unused

Bit 1

Unused

Bit 0

R/W

Reserved[0]

This register provides reset control and enable control for CSTR block #1

Reserved[11:0]

The Reserved bits must be set to the indicated default value for correct operation of the NSE.

CSU_RSTB

The CSU_RSTB signal is a software reset signal that forces the CSU into reset. The CSU is

reset when the CSU_RSTB is logic 0. The CSU is also reset by the NSE-8G master analog

reset signal. When the CSU is reset, the reset signal should be held for at least 100us.

CSU_ENB

The CSU enable control signal (CSU_ENB) bit forces the CSU into low power configuration.

The CSU is disabled when CSU_ENB is logic one. The CSU is enabled when CSU_ENB is

logic 0.

PM8621 Datasheet(PDF) 83 Page - PMC-Sierra, Inc

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