GL9714 datasheet(7/46 Pages) GENESYS

7 / 46 page

GL9714 PCI Express

TM PIPE x4 PHY

Page 7

LIST OF TABLES

TABLE 3.1 - BALL OUT....................................................................................................... 10

TABLE 3.2 - NUMERIC PIN LIST......................................................................................... 11

TABLE 3.3 - ALPHABETIC PIN LIST ................................................................................... 13

TABLE 3.4 - PIN DESCRIPTIONS ......................................................................................... 15

TABLE 3.5 - PARAMETER OF BUFFER I/O ......................................................................... 17

TABLE 4.1 - BASE ADDRESS FOR REGISTERS .................................................................... 18

TABLE 6.1 - PIN FUNCTIONS .............................................................................................. 32

TABLE 7.1 - DC ELECTRICAL CHARACTERISTICS............................................................ 35

TABLE 7.2 - TRANSMIT AND RECEIVE LATENCY TIME .................................................... 35

TABLE 7.3 – TRANSITION TIME OF POWER STATE ........................................................... 35

TABLE 7.4 – TYPICAL POWER CONSUMPTION WITH 2-LANES, 4-LANES, AND 1.2V

DIFFERENTIAL PEAK TO PEAK OUTPUT VOLTAGE .......................................................... 37

TABLE 7.5 – TYPICAL POWER CONSUMPTION WITH SINGLE-LANE AND 1.2V

DIFFERENTIAL PEAK TO PEAK OUTPUT VOLTAGE .......................................................... 38

TABLE 7.6 – TRANSMITTER SERIAL OUTPUT.................................................................... 39

TABLE 7.7 – RECEIVER SERIAL OUTPUT .......................................................................... 40

TABLE 7.8 – TEMPERATURE RANGE ................................................................................. 40

TABLE 7.9 – THERMAL CHARACTERISTICS ...................................................................... 40

TABLE 8.1 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 8-BIT SDR MODE ... 42

TABLE 8.2 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 8-BIT DDR MODE .. 43

TABLE 8.3 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 16-BIT MODE.......... 43

TABLE 8.4 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 10-BIT SDR MODE . 43

TABLE 8.5 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 10-BIT DDR MODE 44

TABLE 8.6 – REFERENCE TIMING INFORMATION ............................................................. 44

TABLE 10.1 - ORDERING INFORMATION ........................................................................... 46

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