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GL9714 Datasheet(PDF) 31 Page - GENESYS LOGIC

Part # GL9714
Description  PCI ExpressTM PIPE x4 PHY
PDF  46 Pages
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Manufacturer  GENESYS [GENESYS LOGIC]
Direct Link  http://www.genesyslogic.com
Logo GENESYS - GENESYS LOGIC

GL9714 Datasheet(HTML) 31 Page - GENESYS LOGIC

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GL9714 PCI Express
TM PIPE x4 PHY
©2004-2007 Genesys Logic Inc. - All rights reserved.
Page 31
6.8 Behavior Summary
PD[1:0]
TXDET/LPBK
TXIDLEx
Behavior
0
0
GL9714 is transmitting data from MAC interface normally.
0
1
GL9714 is not transmitting and is in electrical idle.
1
0
GL9714 enters Loopback mode.
P0
1
1
Illegal
X
0
Illegal
P0S
X
1
GL9714 is not transmitting and is in electrical idle.
X
0
Illegal
0
1
GL9714 is idle.
P1
1
1
GL9714 performs a receiver detection.
X
0
GL9714 transmits a beacon.
P2
X
1
GL9714 is idle.
6.9 Power Saving Support
The GL9714 supports four power states including P0, P0s, P1 and P2 and can be controlled to perform Active
State Power Management on a PCI Express link. P0 is the normal operational state where data and control
packets can be transmitted and received. When directed from P0 to a lower power state, the GL9714 can
immediately take appropriate power saving actions. The power saving scheme of the GL9714 for various power
down states is listed in the table below.
PD[1:0]
Transmitter
Receiver
PLL
PCLK Output
P0
On
On
On
On
P0s
High-impedance
Electrical Idle
On
On
On
P1
High-impedance
Electrical Idle
Off but exit from
Electrical Idle is
detectable
On
On
P2
High-impedance
Electrical Idle
(Capable of transmitting
a Beacon)
Off but exit from
Electrical Idle is
detectable
Off
Off



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