 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
GL9714 Datasheet(PDF) 22 Page - GENESYS LOGIC |
|
|
|||||||||||||||||||||||||||||
GL9714 Datasheet(HTML) 22 Page - GENESYS LOGIC |
|
|
22 / 46 page  GL9714 PCI Express TM PIPE x4 PHY ©2004-2007 Genesys Logic Inc. - All rights reserved. Page 22 4.3 SMBus Protocol GL9714 registers are programmed by System Management Bus (SMBus). Fig. 4.1 shows the SMBus topology. The VDD power is 2.5V +/- 10% and the pull up resistor is 1K . Both SMBCLK and SMBDAT lines are bi-directional, connected to 2.5V supply voltage through a pull-up resistor. The operating frequency is 10~100KHz and the SMBus address of GL9714 is 7’h2C. Figure 4.1 – SMBus Topology of GL9714 SMBus uses fixed voltage levels to define the logic “ZERO” and logic “ONE” on the bus respectively. The data on SMBDAT must be stable during the “HIGH” period of the clock. Data can change state only when SMBCLK is low. Fig. 4.2 illustrates the relationships. Figure 4.2 – Data Validity |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
