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GL9714 Datasheet(PDF) 23 Page - GENESYS LOGIC

Part # GL9714
Description  PCI ExpressTM PIPE x4 PHY
PDF  46 Pages
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Manufacturer  GENESYS [GENESYS LOGIC]
Direct Link  http://www.genesyslogic.com
Logo GENESYS - GENESYS LOGIC

GL9714 Datasheet(HTML) 23 Page - GENESYS LOGIC

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GL9714 PCI Express
TM PIPE x4 PHY
©2004-2007 Genesys Logic Inc. - All rights reserved.
Page 23
Two unique bus situations define a message START and STOP condition.
1. A HIGH to Low transition of the SMBDAT line while SMBCLK is HIGH indicates a message START
condition.
2. A LOW to HIGH transition of the SMBDAT line while SMBCLK is HIGH defines a message STOP
condition.
Figure 4.3 – START and STOP Condition
Every byte consists of 8 bits. Each byte transferred on the bus must be followed by an acknowledge bit. Bytes
are transferred with the most significant bit (MSB) first. Fig. 4.4 illustrates the positioning of acknowledge
(ACK) and not acknowledge (NACK) pulses relative to other data.
Figure 4.4 – ACK and NACK Signaling of SMBus



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