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IMX91CEC Datasheet(PDF) 32 Page - NXP Semiconductors |
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IMX91CEC Datasheet(HTML) 32 Page - NXP Semiconductors |
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32 / 100 page ![]() Table 33. PDM timing parameters Parameter Value trs, tfs @ (moduleNickname)_CLK_ROOTrate <= floor (kxCLKDIV) - 1 1 trh, tfh ≥ 0 1. @moduleNickname = PDM. Depending on K value, user must make sure floor (K x CLKDIV) > 1 to avoid timing problems. Table 34. K factor value Quality factor K factor High Quality 1/2 Medium Quality, Very Low Quality 0 1 Low Quality, Very Low Quality 1 2 Very Low Quality 2 4 Figure 18 illustrates the timing requirements for the PDM. PDM_CLK trs tfs PDM_DATAn Left Data High Impedance Right Data High Impedance Left Data High Impedance Right Data Data Impedance Data Impedance Data Impedance Data trh tfh Left Data High Impedance Right Data Right Data High Impedance High Impedance Left Data Figure 18. PDM input/output timing requirements NXP Semiconductors IMX91CEC i.MX 91 Application Processors Data Sheet for Commercial Products IMX91CEC All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Preliminary Data Sheet Rev. 2 — 12 November 2024 Preliminary - Subject to Change Without Notice 32 / 100 |
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