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IMX91CEC Datasheet(PDF) 36 Page - NXP Semiconductors

Part # IMX91CEC
Description  i.MX 91 Application Processors Data Sheet for Commercial Products
PDF  100 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

IMX91CEC Datasheet(HTML) 36 Page - NXP Semiconductors

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Tsmp_req = B [RAS (CAS + CP + CADIN) + (RAS + RADCtotal) CADIN]
Figure
20.
ADC input impedance equivalent circuit diagram
4.12 External peripheral interface parameters
The following subsections provide information on external peripheral interfaces.
4.12.1 Ultra-high-speed SD/SDIO/MMC host interface (uSDHC) AC timing
This section describes the electrical information of the uSDHC, which includes SD/eMMC5.1 (single data rate) timing, eMMC5.1/
SD3.0 (dual data rate) timing and SDR50/SDR104 AC timing.
The DSE[5:0] = 001111 and FSEL1[1:0] = 11 are required drive settings to meet the timing.
4.12.1.1 SD3.0/eMMC5.1 (single data rate) AC timing
Figure 21 depicts the timing of SD3.0/eMMC5.1, and Table 38 lists the SD3.0/eMMC5.1 timing characteristics.
NXP Semiconductors
IMX91CEC
i.MX 91 Application Processors Data Sheet for Commercial Products
IMX91CEC
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Preliminary Data Sheet
Rev. 2 — 12 November 2024
Preliminary - Subject to Change Without Notice
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