IMX91CEC datasheet(13/100 Pages) NXP

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3. VDD_ANAx_0P8 refers to VDD_ANA_0P8 on 11 x 11 mm package, whereas VDD_ANA0_0P8 and VDD_ANA1_0P8 on 9

x 9 mm package.

4. VDD_ANAx_1P8 refers to VDD_ANA0_1P8, VDD_ANA1_1P8, and VDD_ANAVDET_1P8.

5. Tj minimum temperature supported at startup where Tj = Ta

4.1.5 Maximum frequency of modules

Table 12 provides the maximum frequency of modules in the i.MX 91 of processors.

Table 12. Maximum frequency of modules

Main modules

Frequency (Low Drive mode)

Frequency (Nominal mode)

EdgeLock Secure Encalve

133 MHz

200 MHz

Cortex A55 core

900 MHz1

1.4 GHz

DRAM

800 MHz

1.2 GHz

1. Reduced performance parts are only support Low Drive mode, up to 800 MHz.

4.1.6 Clock sources

This section introduces on-chip oscillator and external clcok sources.

4.1.6.1 External clock sources

The i.MX 91 processor is designed to function with quartz crystals to generate the frequencies necessary for operation. 24 MHz

for the main clock source and 32.768 kHz for the real time clock. External clock can be injected into RTC_XTALI if the frequency

precision and jitter precision are sufficient.

The XTAl input is used to synthesize all of the clocks in the system with the RTC_XTAL input contributing to time keeping and low

frequency operations.

Table 13 shows the interface frequency requirements.

Table 13. External input clock frequency

Parameter Description

Symbol

Min

Typ

Max

Unit

RTC_XTALI Oscillator1

fckil

—

32.7682

—

kHz

1. External oscillator or a crystal with internal oscillator amplifier.

2. Recommended nominal frequency is 32.768 kHz.

Table 14 shows the external input clock for RTC_XTAL oscillator.

Table 14. RTC_OSC

Description

Symbol

Min

Typ

Max

Unit

Frequency

—

32.768

—

kHz

RTC_XTALI

VIH

0.9 x NVCC_BBSM_1P8

—

NVCC_BBSM_1P8

VIL

—

0.1 x NVCC_BBSM_1P8

Duty cycle

—

NXP Semiconductors

IMX91CEC

i.MX 91 Application Processors Data Sheet for Commercial Products

IMX91CEC

All information provided in this document is subject to legal disclaimers.

Preliminary Data Sheet

Rev. 2 — 12 November 2024

Preliminary - Subject to Change Without Notice

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