TMP88CS38FG datasheet(103/226 Pages) TOSHIBA

103 / 226 page

TMP88CS38/CM38A/CP38A

2007-09-12

88CS38-103

Serial Bus Interface Status Register A

SBISRA

(00020H)

SWR

MON

(Initial value: **** ***1)

SWRMON

Software reset monitor

0: During software reset

− (Initial)

Read

only

Serial Bus Interface Status Register B

SBISRB

(00023H)

“1”

SIOF

SEF

“1”

SIOF

Serial transfer operating status

monitor

0: Transfer terminated

1: Transfer in process

SEF

Shift operating status monitor

0: Shift operation terminated

1: Shift operation in process

Read

only

Note:

Set bit7 to 4, bit1 and bit0 in SBISRB to “1”.

Figure 2.9.20 Control Register/Data Buffer Register/Status Register in SIO Mode (2)

(1) Serial clock

a. Clock source

The SCK (Bits 2 to 0 in SBICRA) is used to select the following functions.

1. Internal clock

In an internal clock mode, any of seven frequencies can be selected. The serial

clock is output to the outside on the SCK pin. The SCK pin becomes a high level

when data transfer starts. When writing (in the transmit mode) or reading (in the

receive mode) data cannot follow the serial clock rate, an automatic-wait function

is executed to stop the serial clock automatically and hold the next shift operation

until reading or writing is complete.

Figure 2.9.21 Automatic Wait Function

2. External (SCK

= “111”)

An external clock supplied to the SCK pin is used as the serial clock. In order to

ensure shift operation, a pulse width of at least 2-machine cycles is required for

both high and low levels in the serial clock. The maximum data transfer frequency

is 1MHz (fc

= 16.0 MHz).

Figure 2.9.22 The Maximum Data Transfer Frequency in The External Clock Input

a2 a5

Automatic-wait function

SCK

pin output

SO pin output

Write transmitted data

b1 b4

SCK

tSCKL tSCKH

tSCKL, tSCKH > 2 tcyc

Note: tcyc

= 4/fc (in NORMAL mode, IDLE mode)

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