TSC2014IYZGR datasheet(48/62 Pages) TI2

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TSC2014

SBAS484B – SEPTEMBER 2010 – REVISED DECEMBER 2016

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7.6.6 Converter Function Select Register

The Converter Function Select (CFN) register reflects the converter function select status.

Figure 42. Converter Function Select Status Register (Reset Value = 0000h)

MSB

D15

D14

D13

D12

D11

D10

LSB

CFN1

CFN9

CFN8

CFN7

CFN6

CFN5

CFN4

CFN3

CFN2

CFN1

CFN0

7.6.6.1 CFN15-CFN13

Touch screen drivers status. These bits represent the current status of the touch screen drivers that are turned

on. CFN13 is set to '1' if both X+ and X- drivers are turned on. CFN14 is set to '1' if both Y+ and Y- drivers are

turned on. CFN15 is set to '1' if Y+ and X- drivers are turned on. Otherwise, these bits are set to '0'. These bits

are reset to 0h whenever the converter function is either complete, stopped by the STS bit, or reset (by a

hardware reset from the RESET pin or a software reset from SWRST bit in Control Byte 1).

7.6.6.2 CFN12-CFN0

Converter function select status. These bits represent the converter function currently running, which is set in bits

C3-C0 of Control Byte 1. When the CFNx bit shows '1', where x is the decimal value of converter function select

bits C3-C0, it indicates that the converter function that is set in bits C3-C0 is running. For example, when CFN2

shows '1', it indicates the converter function set in bits C3-C0 ('0010') is running. The CFNx bits are reset to

0000h whenever the converter function is complete, stopped by STS bit, or reset (by the hardware reset from the

RESET pin or the software reset from SWRST bit in Control Byte 1). However, if the TSC-initiated scan function

mode is issued (by setting the PSM bit in the CFR0 register to '1'), the CFN0 or CFN1 bit will not be reset when

the corresponding converter function is complete because there is no pen touch. This event allows the TSC2014

to immediately initiate the scan process (corresponding to CFN0 or CFN1 set to '1') when the next pen touch is

detected.

Figure 43. STATUS Register (Reset Value = 0004h)

MSB

D15

D14

D13

D12

D11

D10

LSB

DAV

Due

DAV

Due

DAV

Due

DAV

Due

DAV

Due

AUX

DAV

Due

TEMP

DAV

Due

TEMP

RESR

(read

'0')

RESET

Flag

CON

RESRV

(read

'0')

SHR

PDST

ID1

ID0

7.6.6.3 DAV Bits

Data available bits. These seven bits mirror the operation of the internal signals of DAV. When any processed

data are stored in data registers, the corresponding DAV bit is set to '1'. It stays at '1' until the register(s) updated

to the processed data have been read out by the host.

Table 22. DAV Function

DAV

DESCRIPTION

No new processed data are available.

Processed data are available. This will stay at 1 until the host has read out all updated registers.

7.6.6.4 RESET Flag

See Table 23 for the interpretation of the RESET flag bits.

Table 23. RESET Flag Bits

RESET Flag

DESCRIPTION

Device was reset since last status poll (hardware or software reset).

Device has not been reset since last status poll.

TSC2014IYZGR Datasheet(PDF) 48 Page - Texas Instruments

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