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TSC2014IYZGR Datasheet(PDF) 51 Page - Texas Instruments |
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TSC2014IYZGR Datasheet(HTML) 51 Page - Texas Instruments |
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51 / 62 page ![]() X+ Y+ X- Y- Auxiliary Input GND TSC2014 GND 1 F m 0.1 F m Touch Screen SDA SCL Host Processor PENIRQ SDA SCL 1.2kW 1.2kW 1.6VDC GPIO GPIO RESET Copyright © 2016, Texas Instruments Incorporated 51 TSC2014 www.ti.com SBAS484B – SEPTEMBER 2010 – REVISED DECEMBER 2016 Product Folder Links: TSC2014 Submit Documentation Feedback Copyright © 2010–2016, Texas Instruments Incorporated 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information Communication with the TSC2014 is done via an I2C serial interface. The TSC2014 is an I2C slave device; therefore, data are shifted into or out of the TSC2014 under the control of the host microprocessor, which also provides the serial data clock. Control of the TSC2014 and its functions is accomplished by writing to different registers in the TSC2014. A simple command protocol (compatible with I2C) is used to address these registers. This protocol can be an I2C write-addressing followed by multiple control bytes, or multiple combinations of control/data bytes to be written into different registers (two bytes each). Reading from registers is performed by writing an I2C read-addressing to the TSC, followed by one or multiple sequential reads from the registers. The address of the register to be read can be written in TSC Control Byte 0 with the register address and read- bit (as described in the previous paragraph), and serves as a pointer to the register map where the first read starts. This designated register address is static; there is no need to write a register address again unless it is overwritten by a new register address, or if the TSC is reset (by a software reset or by the RESET pin). The measurement result is placed in the TSC2014 registers and may be read by the host at any time. This preprocessing frees up the host so that resources can be redirected for more critical tasks. Two optional signals are also available from the TSC2014 to indicate that data are available for the host to read. PINTDAV is a programmable interrupt/status output pin. When PINTDAV is programmed as a DAV output, it indicates that an A/D conversion has completed and that data are available. When this pin is programmed as a PENIRQ output, it indicates that a touch has been detected on the touch screen. The status register of the TSC2014 provides an extended status reading including the state of DAV and PENIRQ without the cost of any dedicated pin. Figure 45 shows a typical application of the TSC2014. 8.2 Typical Application Figure 45. Typical Circuit Configuration |
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