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LM64 Datasheet(PDF) 25 Page - Texas Instruments |
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LM64 Datasheet(HTML) 25 Page - Texas Instruments |
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25 / 42 page  Address Hex Read/ Write Bits POR Value Name Description 4FHEX LOOKUP TABLE HYSTERESIS 4F R/W 7:5 000 Lookup Table Hysteresis These bits are unused and always set to 0 4:0 00100 The amount of hysteresis applied to the Lookup Table. (1 LSB = 1°C). 7.1.4.2 Configuration Register ADDRESS Hex Read/ Write Bits POR Value Name Description 03 (09)HEX CONFIGURATION REGISTER 03 (09) R/W 7 0 ALERT Mask When this bit is a 0, ALERT interrupts are enabled. When this bit is set to a 1, ALERT interrupts are masked, and the ALERT pin is always in a high impedance (open) state. 6 0 STANDBY When this bit is a 0, the LM64 is in operational mode, converting, comparing, and updating the PWM output continuously. When this bit is a 1, the LM64 enters a low power standby mode. In STANDBY, continuous conversions are stopped, but a conversion/comparison cycle may be initiated by writing any value to register 0x0F. Operation of the PWM output in STANDBY depends on the setting of bit 5 in this register. 5 0 PWM Disable in STANDBY When this bit is a 0, the LM64’s PWM output continues to output the current fan control signal while in STANDBY. When this bit is a 1, the PWM output is disabled (as defined by the PWM polarity bit) while in STANDBY. 4:1 0000 These bits are unused and always set to 0. 0 0 RDTS Fault Queue 0: an ALERT will be generated if any Remote Diode conversion result is above the Remote High Set Point or below the Remote Low Setpoint. 1: an ALERT will be generated only if three consecutive Remote Diode conversions are above the Remote High Set Point or below the Remote Low Setpoint. 7.1.4.3 Tachometer Count And Limit Registers ADDRESS Hex Read/ Write Bits POR Value Name Description 47HEX TACHOMETER COUNT (MSB) and 46HEX TACHOMETER COUNT (LSB) REGISTERS (16 bits: Read LSB first to lock MSB and ensure MSB and LSB are from the same reading) 47 Read Only 7:0 N/A Tachometer Count (MSB) These registers contain the current 16-bit Tachometer Count, representing the period of time between tach pulses. Note that the 16-bit tachometer MSB and LSB are reversed from the 16-bit temperature readings 46 Read Only 7:2 N/A Tachometer Count (MSB) Read Only 1:0 00 Tachometer Edge Count Bits: Edges Used Tach_Count_Multiple 00: Reserved - do not use 01: 2 4 10: 2 2 11: 5 1 Note: If PWM_Clock_Select = 360 kHz, then Tach_Count_Multiple = 1 regardless of the setting of these bits. 49HEX TACHOMETER LIMIT (MSB) and 48HEX TACHOMETER LIMIT (LSB) REGISTERS www.ti.com LM64 SNAS207B – MAY 2004 – REVISED JANUARY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: LM64 |
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