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LM64 Datasheet(PDF) 29 Page - Texas Instruments |
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LM64 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 42 page ![]() 7.2 General Purpose Registers ADDRESS Hex Read/ Write Bits POR Value Name Description 1AHEX GENERAL PURPOSE INPUT REGISTER (8-bits) 1A Read Only 7:5 000 These bits are unused and always set to 0. 4:0 See (1) General Purpose Input These 5 bits reflect the logic states of the GPIOx pins. 1BHEX GENERAL PURPOSE OUTPUT REGISTER (8-bits) 1B R/W 7:5 000 These bits are unused and always set to 0. 4:0 See (2) General Purpose Output These 5 bits reflect the GPI register bits [4:0] except for Power-On-Default when they are the 5 logic states of the General Pupose Default (GPD) input pins. (1) For Register 0x1A the Power-On-Reset for the five LSB's are the logic states present on the 5 GPIOx pins. (2) For Register 0x1B the Power-On-Reset for the five LSB's are the logic states present on the 5 GPDx pins. www.ti.com LM64 SNAS207B – MAY 2004 – REVISED JANUARY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: LM64 |
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