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PCF85263ATL/A Datasheet(PDF) 28 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 28 Page - NXP Semiconductors |
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28 / 102 page ![]() NXP Semiconductors PCF85263A Tiny RTC/Calendar with Alarm Function, Battery Switch-Over, Time Stamp Input, and I2C-bus aaa-009585 06 05 04 03 02 01 00 06 00 countdown value, WDR Watchdog clock counter WDF INTA or INTB duration of Watchdog period after start may range from WDR to WDR -1 counts 00 Figure 16. Watchdog single shot mode 7.5.1.3 Watchdog interrupts The generation of interrupts from the Watchdog functions is controlled via the Watchdog interrupt enable bits; WDIEA and WDIEB. These bits are in registers INTA_enable (address 29h) and INTB_enable (address 2Ah). The assertion of the flag WDF can be used to generate an interrupt at pins INTA and INTB. The interrupt can be generated as a pulsed signal every time the Watchdog counter reaches the end of the countdown period. Alternatively, as a permanently active signal that follows the condition of bit WDF, WDF remains set until cleared by command. When enabled, interrupts are triggered every time the Watchdog counter reaches the end of the countdown period and even if the WDF is not cleared, an interrupt pulse can be generated. See Section 7.9 for interrupt control. 7.6 RAM byte Bit Symbol Value Description 7 to 0 B[7:0] 0000 0000 [1] to 1111 1111 RAM content Table 18. RAM_byte - 8-bit RAM register (address 2Ch) bit description [1] Default value. The PCF85263A provides a free RAM byte, which can be used for any purpose, for example, status bits of the system. 7.7 Timestamps There are three timestamp registers that can be independently configured to record the time for battery switch- over events and/or transitions on the TS pin. Each timestamp register has an associated flag. It is also possible to generate an interrupt signal for every timestamp register update. Timestamps work in both RTC and stop-watch mode. During battery operation, the mechanical switch detector can also be used to trigger the timestamp. PCF85263A All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 5.4 — 12 December 2025 Document feedback 28 / 102 |
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