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PCF85263ATL/A Datasheet(PDF) 38 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 38 Page - NXP Semiconductors |
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38 / 102 page  NXP Semiconductors PCF85263A Tiny RTC/Calendar with Alarm Function, Battery Switch-Over, Time Stamp Input, and I2C-bus Symbol Bit INTA INTB Value Description 1 Alarm interrupt generated Alarm2 interrupt enable 0 [1] No alarm interrupt generated 3 A2IEA A2IEB 1 Alarm interrupt generated Timestamp register interrupt enable 0 [1] No timestamp register interrupt generated 2 TSRIEA TSRIEB 1 Timestamp register interrupt generated Battery switch interrupt enable 0 [1] No battery switch interrupt generated 1 BSIEA BSIEB 1 Battery switch interrupt generated Watchdog interrupt enable 0 [1] No Watchdog interrupt generated 0 WDIEA WDIEB 1 Watchdog interrupt generated Table 28. Definition of interrupt control bits...continued [1] Default value. 7.9.1 ILPA/ILPB: interrupt level or pulse mode Interrupts can be configured to generate a pulse or to send a continuous level (permanent signal) which follows the state of the flag. In pulse mode, an interrupt pulse is generated every time that the selected source triggers. Triggered means: • For periodic interrupts, every time a period has elapsed • For offset correction, every time a correction pulse is initiated • For alarms, every time the time increments to match the alarm time • For timestamps, every time a register updates • For battery switch, every time the IC switches to or from the battery • For Watchdog, every time the counter reaches the end of its count The interrupt signal goes active coincidently with the triggering event. The signal is cleared by an internal 128 Hz clock. The internal clock is asynchronous to the triggering event. So, the pulse duration has a minimum period of one 128 Hz cycle and a maximum of two 128 Hz cycles. Interrupt pulses can be shortened by clearing the flag before the end of the pulse period. PCF85263A All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 5.4 — 12 December 2025 Document feedback 38 / 102 |
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