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PCF85263ATL/A Datasheet(PDF) 55 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 55 Page - NXP Semiconductors |
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55 / 102 page  NXP Semiconductors PCF85263A Tiny RTC/Calendar with Alarm Function, Battery Switch-Over, Time Stamp Input, and I2C-bus COF[2:0] Frequency (Hz) Typical duty cycle [1] 111 Static - Table 58. Clock duty cycles...continued [1] Duty cycle definition: % HIGH-level time: % LOW-level time. [2] Default values. The duty cycle of the CLKOUT when outputting 32,768 Hz could change from 60:40 to 40:60 depending on the detector since the 32,768 Hz is derived from the oscillator output, which is not perfect. It could change from device-to-device and it depends on the silicon diffusion. There is nothing that can be done from outside the chip to influence the duty cycle. [3] 1 Hz clock pulses are not affected by offset correction pulses. 7.14 Flags register Bit Symbol Flag name Value Description Read: periodic interrupt flag inactive 0 [1] Write: periodic interrupt flag is cleared Read: periodic interrupt flag active 7 PIF Periodic Interrupt Flag Section 7.13.2 1 Write: periodic interrupt flag remains unchanged Read: alarm2 flag inactive 0 [1] Write: alarm2 flag is cleared Read: alarm2 flag active 6 A2F Alarm2 Flag Section 7.4 1 Write: alarm2 flag remains unchanged Read: alarm1 flag inactive 0 [1] Write: alarm1 flag is cleared Read: alarm1 flag active 5 A1F Alarm1 Flag Section 7.4 1 Write: alarm1 flag remains unchanged Read: Watchdog flag inactive 0 [1] Write: Watchdog flag is cleared Read: Watchdog flag active 4 WDF Watchdog Flag Section 7.5 1 Write: Watchdog flag remains unchanged Read: battery switch flag inactive 0 [1] Write: battery switch flag is cleared Read: battery switch flag active 3 BSF Battery Switch Flag Section 7.11 1 Write: battery switch flag remains unchanged Read: timestamp register 3 flag inactive 0 [1] Write: timestamp register 3 flag is cleared Read: timestamp register 3 flag active 2 TSR3F Timestamp Register 3 event Flag Section 7.7 1 Write: timestamp register 3 flag remains unchanged Read: timestamp register 2 flag inactive 0 [1] Write: timestamp register 2 flag is cleared Read: timestamp register 2 flag active 1 TSR2F Timestamp Register 2 event Flag Section 7.7 1 Write: timestamp register 2 flag remains unchanged Table 59. Flags - Flag status register (address 2Bh) bit description PCF85263A All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 5.4 — 12 December 2025 Document feedback 55 / 102 |
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