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PCF85263ATL/A Datasheet(PDF) 51 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 51 Page - NXP Semiconductors |
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51 / 102 page ![]() NXP Semiconductors PCF85263A Tiny RTC/Calendar with Alarm Function, Battery Switch-Over, Time Stamp Input, and I2C-bus is referenced to the internal power supply. This mode operates when on VDD or VBAT. The pullup resistor value can be controlled by TSPULL bit in the Pin_IO register (for details, see Section 7.12). 7.12.5.1 TS pin input mode There are two input types controlled by the TSIM bit. The TS input can be used to generate a timestamp event by configuring timestamp mode bits; TSR2M[2:0] and TSR1M[1:0] bits in the TSR_mode register. For details, see Table 19. It is also possible to use the TS pin to control the counting of time. This is typically for use with the stop-watch mode where an elapsed time counter function can be implemented. Using the STOPM bit in the Function register (see Table 50) it is possible to control the STOP bit by the TS pin. 7.12.6 INTAPM[1:0]: INTA pin mode control Bit Symbol Value Description INTA pin mode 00 [1] CLK output mode 01 Battery mode indication 10 INTA output 1 to 0 INTAPM[1:0] 11 Hi-Z Table 48. INTAPM[1:0] bits - Pin_IO control register (address 27h) [1] Default value. The INTA pin can be used to output three different signals. INTA (CLK) battery mode clock data INTA data aaa-010464 Figure 30. INTA pin 7.12.6.1 INTAPM[1:0]: INTA The primary function of the INTA pin is to output INTA data. INTA data is controlled by the bits of the INTA_enable register (for details, see Table 28). The output is active LOW with an open-drain output. The output is available during VDD and VBAT operation. 7.12.6.2 INTAPM[1:0]: clock data It is possible to output a clock frequency on the INTA pin. Clock frequency is selected with the COF[2:0] bits in the Function register (Section 7.13). The output is active LOW with an open-drain output. The output is available only during VDD operation. The output is Hi-Z when operating from VBAT. Remark: Clock output is the default state. To save power, it is recommended to disable the clock when not being used. If no clock is required, then set COF[2:0] in the Function register (Section 7.13) to CLK disabled. If clock output is only required on the CLK pin, then set the INTA pin to either INTA data or battery mode. PCF85263A All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 5.4 — 12 December 2025 Document feedback 51 / 102 |
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