LT3757 datasheet(11/38 Pages) AD

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LT3757/LT3757A

Rev. G

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APPLICATIONS INFORMATION

temperature. Prior to lowering the operating frequency,

however, be sure to check with power MOSFET manufac-

turers for their most recent low QG, low RDS(ON) devices.

Power MOSFET manufacturing technologies are con-

tinually improving, with newer and better performance

devices being introduced almost yearly.

An effective approach to reduce the power consumption

of the internal LDO for gate drive is to tie the INTVCC pin

to an external voltage source high enough to turn off the

internal LDO regulator.

If the input voltage VIN does not exceed the absolute maxi-

mum rating of both the power MOSFET gate-source volt-

age (VGS) and the INTVCC overvoltage lockout threshold

voltage (17.5V), the INTVCC pin can be shorted directly

to the VIN pin. In this condition, the internal LDO will be

turned off and the gate driver will be powered directly

from the input voltage, VIN. With the INTVCC pin shorted to

VIN, however, a small current (around 16µA) will load the

INTVCC in shutdown mode. For applications that require

the lowest shutdown mode input supply current, do not

connect the INTVCC pin to VIN.

In SEPIC or flyback applications, the INTVCC pin can be

connected to the output voltage VOUT through a blocking

diode, as shown in Figure 3, if VOUT meets the following

conditions:

1. VOUT < VIN (pin voltage)

2. VOUT < 17.5V

3. VOUT < maximum VGS rating of power MOSFET

A resistor RVCC can be connected, as shown in Figure 3, to

limit the inrush current from VOUT. Regardless of whether

or not the INTVCC pin is connected to an external volt-

age source, it is always necessary to have the driver cir-

cuitry bypassed with a 4.7µF low ESR ceramic capacitor to

ground immediately adjacent to the INTVCC and GND pins.

Figure 3. Connecting INTVCC to VOUT

CVCC

4.7µF

VOUT

3757 F03

INTVCC

GND

LT3757

RVCC

DVCC

Operating Frequency and Synchronization

The choice of operating frequency may be determined

by on-chip power dissipation, otherwise it is a trade-off

between efficiency and component size. Low frequency

operation improves efficiency by reducing gate drive cur-

rent and MOSFET and diode switching losses. However,

lower frequency operation requires a physically larger

inductor. Switching frequency also has implications

for loop compensation. The LT3757 uses a constant-

frequency architecture that can be programmed over a

100kHz to 1000kHz range with a single external resistor

from the RT pin to ground, as shown in Figure 1. The

RT pin must have an external resistor to GND for proper

operation of the LT3757. A table for selecting the value

of RT for a given operating frequency is shown in Table 1.

Table 1. Timing Resistor (RT) Value

OSCILLATOR FREQUENCY (kHz)

RT (kΩ)

100

140

200

63.4

300

41.2

400

30.9

500

24.3

600

19.6

700

16.5

800

900

12.1

1000

10.5

The operating frequency of the LT3757 can be synchro-

nized to an external clock source. By providing a digital

clock signal into the SYNC pin, the LT3757 will oper-

ate at the SYNC clock frequency. If this feature is used,

an RT resistor should be chosen to program a switch-

ing frequency 20% slower than SYNC pulse frequency.

The SYNC pulse should have a minimum pulse width of

200ns. Tie the SYNC pin to GND if this feature is not used.

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