LT3757 datasheet(13/38 Pages) AD

13 / 38 page

LT3757/LT3757A

Rev. G

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APPLICATIONS INFORMATION

FBX Frequency Foldback

When VOUT is very low during start-up or a short-circuit

fault on the output, the switching regulator must operate

at low duty cycles to maintain the power switch current

within the current limit range, since the inductor cur-

rent decay rate is very low during switch off time. The

minimum on-time limitation may prevent the switcher

from attaining a sufficiently low duty cycle at the pro-

grammed switching frequency. So, the switch current

will keep increasing through each switch cycle, exceed-

ing the programmed current limit. To prevent the switch

peak currents from exceeding the programmed value, the

LT3757 contains a frequency foldback function to reduce

the switching frequency when the FBX voltage is low (see

the Normalized Switching Frequency vs FBX graph in the

Typical Performance Characteristics section).

The typical frequency foldback waveforms are shown

in the Typical Performance Characteristics section. The

frequency foldback function prevents IL from exceeding

the programmed limits because of the minimum on-time.

During frequency foldback, external clock synchroniza-

tion is disabled to prevent interference with frequency

reducing operation.

Thermal Lockout

If LT3757 die temperature reaches 165°C (typical), the

part will go into thermal lockout. The power switch will

be turned off. A soft-start operation will be triggered. The

part will be enabled again when the die temperature has

dropped by 5°C (nominal).

Loop Compensation

Loop compensation determines the stability and transient

performance. The LT3757/LT3757A use current mode

control to regulate the output which simplifies loop com-

pensation. The LT3757A improves the no-load to heavy

load transient response, when compared to the LT3757.

New internal circuits ensure that the transient from not

switching to switching at high current can be made in a

few cycles.

The optimum values depend on the converter topology, the

component values and the operating conditions (including

the input voltage, load current, etc.). To compensate the

feedback loop of the LT3757/LT3757A, a series resistor-

capacitor network is usually connected from the VC pin

to GND. Figure 1 shows the typical VC compensation net-

work. For most applications, the capacitor should be in

the range of 470pF to 22nF, and the resistor should be

in the range of 5k to 50k. A small capacitor is often con-

nected in parallel with the RC compensation network to

attenuate the VC voltage ripple induced from the output

voltage ripple through the internal error amplifier. The par-

allel capacitor usually ranges in value from 10pF to 100pF.

A practical approach to design the compensation network

is to start with one of the circuits in this data sheet that

is similar to your application, and tune the compensation

network to optimize the performance. Stability should

then be checked across all operating conditions, includ-

ing load current, input voltage and temperature.

SENSE Pin Programming

For control and protection, the LT3757 measures the

power MOSFET current by using a sense resistor (RSENSE)

between GND and the MOSFET source. Figure 4 shows a

typical waveform of the sense voltage (VSENSE) across the

sense resistor. It is important to use Kelvin traces between

the SENSE pin and RSENSE, and to place the IC GND as

close as possible to the GND terminal of the RSENSE for

proper operation.

Figure 4. The Sense Voltage During a Switching Cycle

3757 F04

VSENSE(PEAK)

∆VSENSE = χ • VSENSE(MAX)

VSENSE

DTS

VSENSE(MAX)

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