Electronic Components Datasheet Search
  English  ▼

X  

ADS5560 Datasheet(PDF) 7 Page - Texas Instruments

Click here to check the latest version.
Part # ADS5560
Description  16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS
PDF  53 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS5560 Datasheet(HTML) 7 Page - Texas Instruments

Back Button ADS5560 Datasheet HTML 3Page - Texas Instruments ADS5560 Datasheet HTML 4Page - Texas Instruments ADS5560 Datasheet HTML 5Page - Texas Instruments ADS5560 Datasheet HTML 6Page - Texas Instruments ADS5560 Datasheet HTML 7Page - Texas Instruments ADS5560 Datasheet HTML 8Page - Texas Instruments ADS5560 Datasheet HTML 9Page - Texas Instruments ADS5560 Datasheet HTML 10Page - Texas Instruments ADS5560 Datasheet HTML 11Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 53 page
background image
DIGITAL CHARACTERISTICS
Dn_Dn+1_P
Dn_Dn+1_P
Dn_Dn+1_M
Dn_Dn+1_M
GND
GND
V
* With external 100-
termination
W
V
OCM
Logic0
V
= –350mV*
ODL
Logic1
V
=350mV*
ODH
T0334-01
ADS5560
ADS5562
www.ti.com ....................................................................................................................................................................................................... SLWS207 – MAY 2008
DC specifications refer to the condition where the digital outputs are not switching, but are permanently at a valid logic level 0
or 1, AVDD = 3.0V to 3.6V, IO = 3.5 mA, RL = 100 Ω
(1) (2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUTS
High-level input voltage
2.4
V
Low-level input voltage
0.8
V
High-level input current
33
µA
Low-level input current
-33
µA
Input capacitance
4
pF
DIGITAL OUTPUTS – CMOS MODE
High-level output voltage
DRVDD
V
Low-level output voltage
0
V
Output capacitance
Capacitance inside the device from each output pin to
4
pF
ground
DIGITAL OUTPUTS – LVDS MODE
VODH High-level output voltage
+350
mV
VODL Low-level output voltage
-350
mV
VOCM Output common-mode
1.2
V
voltage
Output capacitance
Capacitance inside the device from each output pin to
4
pF
ground
(1)
All LVDS and CMOS specifications are characterized, but not tested at production.
(2)
IO refers to the LVDS buffer current setting; RL is the differential load resistance between the LVDS output pair.
Figure 1. LVDS Output Voltage Levels
Copyright © 2008, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Link(s): ADS5560 ADS5562



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com