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ADS5560 Datasheet(PDF) 22 Page - Texas Instruments |
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ADS5560 Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 53 page ![]() PIN CONFIGURATION (LVDS MODE) DRGND DRVDD OVR CLKOUTM CLKOUTP DFS OE AVDD AGND CLKP CLKM AGND 1 2 3 4 5 6 7 8 9 10 11 12 DRGND DRVDD D2_D3_P D2_D3_M D0_D1_P D0_D1_M RESET SCLK SDATA SEN AVDD AGND 36 35 34 33 32 31 30 29 28 27 26 25 P0023-09 ADS556x RGZPACKAGE (TOP VIEW) ThermalPad ADS5560 ADS5562 SLWS207 – MAY 2008 ....................................................................................................................................................................................................... www.ti.com Figure 8. LVDS Mode Pinout Table 21. PIN ASSIGNMENTS – LVDS Mode PIN PIN NUMBER PIN NAME DESCRIPTION TYPE NUMBER OF PINS AVDD Analog power supply I 8, 18, 20, 6 22, 24, 26 AGND Analog ground I 9, 12, 14, 17, 6 19, 25 CLKP, CLKM Differential clock input I 10, 11 2 INP, INM Differential analog input I 15, 16 2 VCM Internal reference mode – Common-mode voltage output. I/O 13 1 External reference mode – Reference input. The voltage forced on this pin sets the internal reference. RESET Serial interface reset input. I 30 1 When using the serial interface, the user should apply a high-going pulse on this pin to reset the internal registers. When the serial interface is not used, the user should tie RESET permanently high. (SCLK, SDATA and SEN can be used as parallel pin controls). The pin has an internal 100-k Ω pull-down resistor to DRGND. 22 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ADS5560 ADS5562 |
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