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ADS5560 Datasheet(PDF) 28 Page - Texas Instruments |
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ADS5560 Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 53 page ![]() 82 83 84 85 86 87 88 T − Temperature − °C G015 80 82 84 86 88 90 92 −40 −20 0 20 40 60 80 SFDR SNR fIN = 10.1 MHz 75 77 79 81 83 85 87 89 91 Input Amplitude − dBFS 40 50 60 70 80 90 100 110 120 −60 −50 −40 −30 −20 −10 0 G016 SFDR (dBc) SFDR (dBFS) SNR (dBFS) fIN = 5.01 MHz 81 82 83 84 85 86 87 Input Clock Duty Cycle − % G018 72 76 80 84 88 92 96 35 40 45 50 55 60 65 SNR SFDR fIN = 5.01 MHz 80 81 82 83 84 85 86 87 88 78 80 82 84 86 88 90 92 94 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Input Clock Amplitude − VPP G017 SNR SFDR fIN = 10.1 MHz 82 83 84 85 86 87 VVCM − VCM Voltage − V 80 82 84 86 88 90 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 fIN = 5.01 MHz External Reference Mode G020 SNR SFDR Output Code 0 5 10 15 20 25 30 35 40 G019 RMS (LSB) = 1.424 ADS5560 ADS5562 SLWS207 – MAY 2008 ....................................................................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) Typical values are at 25 °C, AVDD = DRVDD = 3.3 V, sampling frequency = Max Rated, sine wave input clock, 1.5 V PP clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, DDR LVDS interface, default fine gain (1dB), (unless otherwise noted) Performance vs Temperature Performance vs Input Amplitude, 0 dB gain Figure 20. Figure 21. Performance vs Clock Amplitude Performance vs Clock Duty Cycle Figure 22. Figure 23. Output Noise Histogram Performance in External Reference Mode Figure 24. Figure 25. 28 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ADS5560 ADS5562 |
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