ADS5560 datasheet(30/53 Pages) TI

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fIN − Input Frequency − MHz

G027

CMOS

LVDS

fIN − Input Frequency − MHz

G028

fIN − Input Frequency − MHz

100

G030

Input adjusted to get −1dBFS input

1 dB

0 dB

5 dB

6 dB

2 dB

3 dB

4 dB

fIN − Input Frequency − MHz

G031

5 dB

1 dB

0 dB

3 dB

4 dB

6 dB

Input adjusted to get −1dBFS input

2 dB

AVDD − Supply Voltage − V

G034

3.0

3.1

3.2

3.3

3.4

3.5

3.6

SNR

SFDR

fIN = 5.01 MHz

DRVDD = 3.3 V

DRVDD − Supply Voltage − V

G035

100

3.0

3.1

3.2

3.3

3.4

3.5

3.6

SNR

SFDR

fIN = 5.01 MHz

AVDD = 3.3 V

ADS5560

ADS5562

SLWS207 – MAY 2008 ....................................................................................................................................................................................................... www.ti.com

TYPICAL CHARACTERISTICS (continued)

Typical values are at 25

°C, AVDD = DRVDD = 3.3 V, sampling frequency = Max Rated, sine wave input clock, 1.5 V

PP clock

amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, DDR LVDS interface, default fine

gain (1dB), (unless otherwise noted)

SNR vs Fin, 0 dB gain

SFDR vs Fin

Figure 30.

Figure 31.

SFDR Across Fine Gain

SNR Across Fine Gain

Figure 32.

Figure 33.

Performance vs AVDD Supply

Performance vs DRVDD Supply

Figure 34.

Figure 35.

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