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ES9039Q2M Datasheet(PDF) 14 Page - ESS Technology,Inc |
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ES9039Q2M Datasheet(HTML) 14 Page - ESS Technology,Inc |
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14 / 107 page ![]() VERSION 0.2.2 ES9039Q2M Product Datasheet ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM 14 Hardware Mode Pin Configuration The following table shows the available hardware modes for the ES9039Q2M. All Synchronous Hardware modes (HW) have Automatic FS detection enabled with FS & BCK being detected. See Register 3[7] for more details. HW# Description FS [kHz] BCK [MHz] MCLK [MHz] MODE HW2 HW1 HW0 32-bit PCM Master Modes 0 I²S Master MCLK/128 MCLK/2 (64FS) MCLK=128*FS ≤49.152 Pull 0 0 0 0 1 I²S Master MCLK/256 MCLK/4 (64FS) MCLK=256*FS ≤49.152 Pull 0 0 0 1 2 I²S Master MCLK/512 MCLK/8 (64FS) MCLK=512*FS ≤49.152 Pull 0 0 1 0 3 I²S Master MCLK/1024 MCLK/16 (64FS) MCLK=1024*FS ≤49.152 Pull 0 0 1 1 4 LJ Master Mode MCLK/128 MCLK/2 (64FS) MCLK=128*FS ≤49.152 Pull 0 Pull 0 0 0 5 LJ Master Mode MCLK/256 MCLK/4 (64FS) MCLK=256*FS ≤49.152 Pull 0 Pull 0 0 1 6 LJ Master Mode MCLK/512 MCLK/8 (64FS) MCLK=512*FS ≤49.152 Pull 0 Pull 0 1 0 7 LJ Master Mode MCLK/1024 MCLK/16 (64FS) MCLK=1024*FS ≤49.152 Pull 0 Pull 0 1 1 32-bit PCM Slave Modes, SYNC 8 I²S Slave, SYNC, MCLK/1 8<FS<768 64FS 64*FS≤MCLK ≤49.152 Pull 0 Pull 1 0 0 9 I²S Slave, SYNC, MCLK/2 8<FS<384 64FS 128*FS≤MCLK ≤49.152 Pull 0 Pull 1 0 1 10 I²S Slave, SYNC, MCLK/4 8<FS<192 64FS 256*FS≤MCLK ≤49.152 Pull 0 Pull 1 1 0 11 I²S Slave, SYNC, Auto Clock Gear1 (128FS) 8<FS<384 64FS 64*FS≤MCLK ≤49.152 Pull 0 Pull 1 1 1 12 LJ Slave, SYNC, MCLK/1 8<FS<768 64FS 64*FS≤MCLK ≤49.152 Pull 0 1 0 0 13 LJ Slave, SYNC, MCLK/2 8<FS<384 64FS 128*FS≤MCLK ≤49.152 Pull 0 1 0 1 14 LJ Slave, SYNC, MCLK/4 8<FS<192 64FS 256*FS≤MCLK ≤49.152 Pull 0 1 1 0 15 LJ Slave, SYNC, Auto Clock Gear1 (128FS) 8<FS<384 64FS 64*FS≤MCLK ≤49.152 Pull 0 1 1 1 Table 7 – Hardware Mode Pin Configurations Pt1 1 ACG (Auto Clock Gearing) is enabled, it will normally gear the MCLK down to >=128*FS in SYNC, >130*FS in ASYNC, or 2*DSDCLK in DSD modes. |
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