CMV300 datasheet(24/56 Pages) AMSOSRAM

24 / 56 page

Reference:CMV300-datasheet-v2.11

CMV300 Datasheet

Page 22 of 54

4.1.3.1 4 OUTPUTS

The figure below shows the location of the image pixels versus the output channel of the image sensor.

IDLE

Pixel 0 to 323

Channel 1

IDLE

Channel 2

Row 1

Pixel 324 to 647

Pixel 0 to 323

Row 3

Pixel 324 to 647

IDLE

Pixel 0 to 323

Channel 3

IDLE

Channel 4

Pixel 324 to 647

Pixel 0 to 323

Pixel 324 to 647

Row 2

Row 4

Bottom

channels

Top

channels

FIGURE 20: PIXEL REMAPPING FOR 4 OUTPUT CHANNELS

4 bursts (2 x 2) of 324 pixels happen in parallel on the data outputs. This means that two complete rows are read out in

one burst. The amount of rows that will be read out depends on the value in the corresponding register. By default

there are 488 rows being read out.

4.1.3.2 2 OUTPUTS

When only 2 outputs are used, the pixel data is placed on the outputs as detailed in the figure below. 2 bursts of 324

pixels happen in parallel on the data outputs. This means that one complete row is read out in one burst. The time

needed to read out two rows is doubled compared to when 4 outputs are used. The top LVDS channels are not being

used in this mode, so they can be turned off by setting the correct bits in the register with address 81. Turning off these

channels will reduce the power consumption of the chip. The amount of rows that will be read out depends on the value

in the corresponding register. By default there are 488 rows being read out.

IDLE

Pixel 0 to 323

Channel 1

IDLE

Channel 2

Row 1

Pixel 324 to 647

Pixel 0 to 323

Row 2

Pixel 324 to 647

Bottom

channels

FIGURE 21: PIXEL REMAPPING FOR 2 OUTPUT CHANNELS

4.1.3.3 1 OUTPUT

When only 1 output is used, 1 burst of 324 pixels happens on the data outputs. This means that one complete row is

read out in 2 bursts. The time needed to read out one row is 2x longer compared to when 2 outputs are used. The top

LVDS channels are not being used in this mode, so these and the remaining bottom channel can be turned off by

setting the correct bits in the register with address 81. Turning off these channels will reduce the power consumption

of the chip. The amount of rows that will be readout depends on the value in the corresponding register. By default

there are 488 rows being read out

IDLE

Pixel 0 to 323

Channel 1

Row 1

Pixel 0 to 323

Pixel 324 to 647

Row 2

Pixel 324 to 647

FIGURE 22: PIXEL REMAPPING FOR 1 OUTPUT CHANNEL

4.1.4 CONTROL CHANNEL

The CMV300 has one LVDS output channel dedicated for the valid data synchronization and timing of the output

channels. The end user must use this channel to know when valid image data or training data is available on the data

output channels.

The control channel transfers status information in 12-bit word format. Every bit of the word has a specific function.

Next table describes the function of the individual bits.

CMV300 Datasheet(PDF) 24 Page - ams-OSRAM AG

CMV300 Datasheet(HTML) 24 Page - ams-OSRAM AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL