AD2437

Rev. 0

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Page 37 of 42

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July 2023

16

SCL

D_IO_OD

GPIO5

Serial clock for I2C data transfers. Clock input I2C target in A2B main node

mode. Clock input (I2C target) or open-drain clock output (I2C controller) in

A

2B subordinate node mode. Place a pull-up resistor on this pin. Consult

version 2.1 of the I2C bus specification for the proper resistor value. When not

used for I

2C, this pin can be configured as a general-purpose I/O pin (GPIO5).

Connect the pin to ground if not used.

17

MISO

2

D_IO

PWM1

GPIO5

SPI Master In Slave Out pin. This pin is a serial data pin when SPI is enabled.

When not used for SPI purposes, this pin can be configured as a PWM output

(PWM1) or as a general-purpose I/O (GPIO5).

18

MOSI5

D_IO

PWM2

GPIO6

SPI Master Out Slave In pin. This pin is a serial data pin when SPI is enabled.

When not used for SPI purposes, this pin can be configured as a PWM output

(PWM2) or as a general-purpose I/O pin (GPIO6).

19

SCK

5

D_IO

PWM3

GPIO0

SPI clock. This pin is the SPI clock pin when SPI is enabled. When not used for

SPI purposes, this pin can be configured as a PWM output (PWM3) or as a

general-purpose I/O (GPIO0).

20

IOVSS

PWR

None

Power supply pin for IOVDD return current.This pin must be connected to

a low impedance local ground plane.

21

IOVDD

PWR

None

Power supply pin for digital input and output pins. This pin is the second

IOVDD pin along with Pin 11. Externally connect the two IOVDD pins together.

22

ADR1

5

D_IO

SPISS

SPISSEL0

PWMOE

CLKOUT

GPIO4

I

2C address 1 pin. This pin (along with the ADR2 pin) sets the I2C target device

address immediately after reset deassertion. After power-on, this pin can be

configured as the SPI slave-select input (SPISS) pin or as an SPI slave-select

output pin (SPISSEL0) when SPI functions are enabled. When not used for SPI

purposes, this pin can serve as the PWM output enable pin (PWMOE) when

PWM functions are enabled. When not used for SPI or PWM purposes, this pin

can be programmed as a clock output pin (CLKOUT1) or as a general-purpose

I/O pin (GPIO4).

23

ADR2

5

D_IO

ASPISS

SPISSEL2

CLKOUT

GPIO4

I

2C address 2 pin. This pin (along with the ADR1 pin) sets the I2C target device

address immediately after reset deassertion. This pin can be configured as the

alternate SPI slave-select input pin (ASPISS) or as an SPI slave-select output

pin (SPISSEL2) when SPI functions are enabled. When not used for SPI

purposes, this pin can be programmed as a clock output pin (CLKOUT2) or as

a general-purpose I/O pin (GPIO4).

24

IRQ6

D_OUT

None

Interrupt request digital output. This pin indicates that the A2B transceiver

is raising an event driven interrupt request towards the host controller.

At the main transceiver, this pin indicates bit errors on the A

2B bus, interrupts

from GP inputs, SPI interrupts, VMTR interrupts, mailbox interrupts, and line

faults detected by the main and the subordinate transceivers.

At the subordinate transceiver, this pin indicates mailbox and SPI related

interrupts.

In bus monitor mode, this pin indicates that the A

2B transceiver has a PLL lock.

This pin cannot be used as a GPIO pin.

25

RST

D_IN

None

Hardware reset. Resets the transceiver when driven low. When all the power

domains are stable, this pin must be driven high externally. This pin must be

pulled high with a 10 kΩ when not used.

26

VSS

PWR

None

Power supply pin for return current. This pin must be connected to a low

impedance local ground plane.

27

ACM

A_IO

None

Common-mode bias pin for bidirectional, differential A2B line trans-

ceiver for A port.

Table 20. AD2437 Pin Function Descriptions (Continued)

Pin No.

Pin Name

Type

Alternate

Functions1

Description

In this table, the type is defined as follows: PWR = power/ground, A_IN = analog input, D_IN = digital input, A_OUT = analog output,



D_OUT = digital output, A_IO = analog input/output, D_IO = digital input/output, D_IO_OD = digital input/open-drain output,



N/A = not applicable.