Rev. 0

|

Page 38 of 42

|

July 2023

AD2437

28

AN

A_IO

None

Bidirectional inverted data pin for A port, differential A2B line driver and

receiver. It is directed towards the upstream transceiver on the A2B bus. This

pin is self biased.

29

AP

A_IO

None

Bidirectional noninverted data pin for A port, differential A

2B line driver

and receiver. It is directed towards the upstream transceiver on the A2B bus.

This pin is self biased.

30

TRXVSS

GND

None

Power supply pin for TRXVDD return currents. Connect this pin to a low

impedance local ground plane.

31

TRXVDD

PWR

None

Power supply pin for A2B line driver and receiver circuit. This pin must be

connected to VOUT2.

32

TRXVSS

GND

None

Power supply pin for TRXVDD return currents. Connect this pin to a low

impedance local ground plane.

33

BP

A_IO

None

Noninverted pin of bidirectional, differential A

2B line driver and receiver

B. It is directed towards the next downstream subordinate transceiver on the

A2B bus. This pin is self biased.

34

BN

A_IO

None

Inverted pin of bidirectional, differential A2B line driver and receiver B.

It is directed towards the next downstream subordinate transceiver on the

A

2B bus. This pin is self biased.

35

BCM

A_IO

None

Common-mode input for bidirectional, differential A

2B line transceiver

B.

36

ISENSEN

A_IN

None

Low side current sense input pin. Analog input to sense the current

returning from the downstream subordinate transceiver. A sense resistor,

connected from ISENSEN to VSENSEN, is required to provide sensing of the

return current when using a single-pair cable. This pin must be pulled low with

a 100 kΩ when using XLR/DMX and CAT cables.

37

VSENSEN

A_IO

None

Low side voltage sense input pin. Analog input to sense the negative power

supplied to the next subordinate device when using a single-pair cable. This

pin must be pulled low with a 100 kΩ when using XLR/DMX and CAT cables.

38

VRVSS

PWR

None

Power supply pin for internal voltage regulators (VOUT1 and VOUT2)

return current. Connect this pin to a low impedance local ground plane.

39

SWN

A_IO

None

Low side MOSFET switch control pin. This output pin drives the gate of an

external low side NMOS when using a single-pair cable. This pin is driven high

to turn on a switch to deliver power to the next subordinate device. The pin

is driven low by default and when fault conditions occur. This pin requires an

external pull-down resistor to keep the external NMOS off during bus initial-

ization. This pin must be pulled low with a 100 kΩ when using XLR/DMX and

CAT cables.

40

VSENSEP

A_IO

None

High side voltage sense input pin. Analog input to sense the bus bias

voltage supplied to the next subordinate device.

41

SWP

A_OUT

None

High side MOSFET switch control pin. This output pin drives the gate of an

external high side NMOS.

When controlling the NMOS, a voltage above VBUS is maintained on this

output pin to turn the external NMOS on and keep it powered during normal

operation to deliver power to the next subordinate device. The pin is driven

low when fault conditions occur.

For the last subordinate node, connect this pin per the reference schematic.

Table 20. AD2437 Pin Function Descriptions (Continued)

Pin No.

Pin Name

Type

Alternate

Functions1

Description

In this table, the type is defined as follows: PWR = power/ground, A_IN = analog input, D_IN = digital input, A_OUT = analog output,



D_OUT = digital output, A_IO = analog input/output, D_IO = digital input/output, D_IO_OD = digital input/open-drain output,



N/A = not applicable.