AD2437 datasheet(26/42 Pages) AD

26 / 42 page

Rev. 0

Page 26 of 42

July 2023

AD2437

Pulse Width Modulation (PWM) Timing

Table 12 describes pulse width modulation (PWM) operations.

2B BUS SYSTEM SPECIFICATION

Table 12. Pulse Width Modulation (PWM) Timing

Parameter

Min

Typ

Max

Unit

Switching Characteristics

fPWM

PWM Frequency

fSYNCM/256

fSYNCM × 4

tPWM_ON

PWM Minimum ON Time

tPWM_OFF

PWM Minimum OFF Time

Table 13. A2B System Specifications

Parameter

System Specification

Cable

CAT5e/CAT6/CAT7; XLR/DMX; or single-pair wire

Maximum Cable Length

300 m total, up to 30 m between nodes

Maximum Number of Nodes

17 nodes (1 main node and 16 subordinate nodes)1

1 Local power nodes are needed to maintain data sheet-specified supply voltages at each node.

Maximum A2B Bus Bandwidth

1024 × fSYNCM

Maximum Number of A2B Data Slots

64 total, up to 32 upstream and 32 downstream data slots. It includes SPI data tunnel slots and

audio data slots. The number of SPI data tunnel slots can be configured between 2 and 12; the

number of audio slots can be configured between 0 to 32 depending upon system design. See

the AD2437 A2B Transceiver Technical Reference.

Number of Audio TDM Channels per Node

Individually programmable 0 to 32 upstream channels and 0 to 32 downstream channels

Synchronous A2B Data Slot Size

8, 12, 16, 20, 24, 28, or 32 bits to match I2S/TDM data-word lengths. Same slot size for all nodes.

Upstream and downstream can choose different slot sizes. 12-, 16-, or 20-bit slot sizes can carry

compressed data over the A

2B bus for 16-, 20-, or 24-bit I2S/TDM word lengths.

Audio Sampling Frequency

44.1 kHz or 48 kHz. All nodes sample synchronously. Subordinate node transceivers support

sample rates (fS) of 1× (48 kHz), 2× (96 kHz) or 4× (192 kHz), individually configured per subor-

dinate node.

Subordinate node transceivers also support reduced rate sampling for 24 kHz, 12 kHz, 6 kHz,

4 kHz, 3 kHz, 2.4 kHz, 2 kHz, 1.71 kHz, or 1.5 kHz at a low latency 48 kHz superframe rate. See

the AD2437 A2B Transceiver Technical Reference for more information.

Discovery Time

<50 ms per node and <<500 ms for total system startup in a system with 10 nodes (includes

Maximum Current Supported During

Discovery per Node (ISYS_DSCVRY)

250 mA

Maximum Capacitive Load per Bus Powered

Subordinate Node CSUB

1000 μF



Bit Error Detection and Correction

Robust error detection for control data and status data with 16-bit cyclic redundancy check

(CRC)

Parity and line code error detection on synchronous data slots with audio error correction

(repeat of last known good data).

For 24-bit and 32-bit data channels, single error correction and double error detection

(SECDED) of synchronous data slots is possible.

Line Fault Diagnostics

Location and cause of fault can be detected for A2B wires shorted to a high voltage (for

example, positive terminal of car battery), shorted to ground, wires shorted to each other, wires

reversed, wires open, or wrong port connection. See the AD2437 A2B Transceiver Technical

Reference for more information.

System EMI/EMC

Meets or exceeds industry specification for robustness

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