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ECP2 Datasheet(PDF) 105 Page - Lattice Semiconductor

Part # ECP2
Description  LatticeECP2/M Family Data Sheet
PDF  386 Pages
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

ECP2 Datasheet(HTML) 105 Page - Lattice Semiconductor

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Pinout Information
Lattice Semiconductor
LatticeECP2/M Family Data Sheet
PICs and DDR Data (DQ) Pins Associated with the DDR Strobe (DQS) Pin
PICs Associated with
DQS Strobe
PIO Within PIC
DDR Strobe (DQS) and
Data (DQ) Pins
For Left and Right Edges of the Device
P[Edge] [n-4]
A
DQ
B
DQ
P[Edge] [n-3]
A
DQ
B
DQ
P[Edge] [n-2]
A
DQ
B
DQ
P[Edge] [n-1]
ADQ
B
DQ
P[Edge] [n]
A
[Edge]DQSn
B
DQ
P[Edge] [n+1]
A
DQ
B
DQ
P[Edge] [n+2]
A
DQ
B
DQ
P[Edge] [n+3]
A
DQ
B
DQ
For Bottom Edge of the Device
P[Edge] [n-4]
A
DQ
B
DQ
P[Edge] [n-3]
A
DQ
B
DQ
P[Edge] [n-2]
A
DQ
B
DQ
P[Edge] [n-1]
A
DQ
B
DQ
P[Edge] [n]
A
[Edge]DQSn
B
DQ
P[Edge] [n+1]
A
DQ
B
DQ
P[Edge] [n+2]
A
DQ
B
DQ
P[Edge] [n+3]
A
DQ
B
DQ
P[Edge] [n+4]
A
DQ
B
DQ
Notes:
1. “n” is a row PIC number.
2. The DDR interface is designed for memories that support one DQS strobe up to 15 bits
of data for the left and right edges and up to 17 bits of data for the bottom edge. In some
packages, all the potential DDR data (DQ) pins may not be available. PIC numbering
definitions are provided in the “Signal Names” column of the Signal Descriptions table.



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