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ECP2 Datasheet(PDF) 114 Page - Lattice Semiconductor

Part # ECP2
Description  LatticeECP2/M Family Data Sheet
PDF  386 Pages
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

ECP2 Datasheet(HTML) 114 Page - Lattice Semiconductor

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4-13
Pinout Information
Lattice Semiconductor
LatticeECP2/M Family Data Sheet
LatticeECP2M Pin Information Summary, LFE2M50, LFE2M70 and
LFE2M100
Pin Type
LFE2M50
LFE2M70
LFE2M100
484 fpBGA 672 fpBGA 900 fpBGA 900 fpBGA 1152 fpBGA 900 fpBGA 1152 fpBGA
Single Ended User I/O
270
372
410
416
436
416
520
Differential Pair User I/O
135
185
205
208
218
207
260
Configuration
TAP Pins
5
5
5
5555
Muxed Pins
14
14
14
14
14
14
14
Dedicated Pins
(Non TAP)
7
7
7
7777
Non Configuration
Muxed Pins
69
72
72
75
76
74
78
Dedicated Pins
3
3
3
3333
VCC
16
20
62
44
44
44
44
VCCAUX
8
26
18
16
12
16
12
VCCPLL
4
8
4
4444
VCCIO
Bank0
4
5
6
6767
Bank1
3
4
6
6767
Bank2
4
5
9
9999
Bank3
4
5
9
9999
Bank4
4
4
6
6767
Bank5
4
5
6
6767
Bank6
4
5
9
9999
Bank7
4
5
9
9999
Bank8
2
2
2
2222
GND, GND0 to GND7
57
80
122
122
134
122
134
NC
31
35
121
63
283
63
199
Single Ended/ Differential
I/O Pairs per Bank (includ-
ing emulated with resis-
tors)
Bank0
36/18
63/31
56/28
34/17
46/23
34/17
54/27
Bank1
18/9
18/9
36/18
42/21
34/17
42/21
44/22
Bank2
30/15
50/25
54/27
70/35
72/36
70/35
80/40
Bank3
36/18
43/21
44/22
60/30
64/32
60/30
80/40
Bank4
42/21
24/12
38/19
38/19
40/20
38/19
44/22
Bank5
28/14
60/30
58/29
40/20
40/20
40/20
46/23
Bank6
40/20
54/27
60/30
62/31
66/33
62/31
82/41
Bank7
40/20
60/30
64/32
70/35
74/37
70/35
90/45
Bank8
0/0
0/0
0/0
0/0
0/0
0/0
0/0
True LVDS I/O Pairs per
Bank
Bank0 (Top Edge)
0
0
0
0000
Bank1 (Top Edge)
0
0
0
0000
Bank2 (Right Edge)
7
12
13
17
18
17
20
Bank3 (Right Edge)
9
11
11
15
16
15
20
Bank4 (Bottom Edge)
0
0
0
0000
Bank5 (Bottom Edge)
0
0
0
0000
Bank6 (Left Edge)
10
14
15
15
16
15
20
Bank7 (Left Edge)
10
15
17
17
18
17
22
Bank8 (Right Edge)
0
0
0
0000



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