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ECP2 Datasheet(PDF) 110 Page - Lattice Semiconductor |
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ECP2 Datasheet(HTML) 110 Page - Lattice Semiconductor |
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110 / 386 page ![]() 4-9 Pinout Information Lattice Semiconductor LatticeECP2/M Family Data Sheet LatticeECP2 Pin Information Summary, LFE2-50 and LFE2-70 Pin Type LFE2-50 LFE2-70 484 fpBGA 672 fpBGA 672 fpBGA 900 fpBGA Single Ended User I/O 339 500 500 583 Differential Pair User I/O 169 249 249 290 Configuration TAP Pins 5555 Muxed Pins 14 14 14 14 Dedicated Pins (Non TAP) 7777 Non Configuration Muxed Pins 68 79 79 89 Dedicated Pins 3333 VCC 16 20 20 26 VCCAUX 16 16 16 17 VCCPLL 4424 VCCIO Bank0 4556 Bank1 4556 Bank2 4556 Bank3 4556 Bank4 4556 Bank5 4556 Bank6 4556 Bank7 4556 Bank8 2222 GND, GND0 to GND7 60 72 72 104 NC 0 3 5 101 Single Ended/ Differential I/O Pairs per Bank (including emulated with resistors) Bank0 50/25 67/33 67/33 84/42 Bank1 46/23 66/33 66/33 76/38 Bank2 38/19 56/28 56/28 74/37 Bank3 22/11 48/24 48/24 48/24 Bank4 46/23 62/31 62/31 72/35 Bank5 46/23 68/34 68/34 80/40 Bank6 40/20 64/32 64/32 64/32 Bank7 37/18 55/27 55/27 71/35 Bank8 14/7 14/7 14/7 14/7 True LVDS I/O Pairs per Bank Bank0 (Top Edge) 0000 Bank1 (Top Edge) 0000 Bank2 (Right Edge) 9 13 13 18 Bank3 (Right Edge) 5 12 12 12 Bank4 (Bottom Edge) 0000 Bank5 (Bottom Edge) 0000 Bank6 (Left Edge) 10 16 16 16 Bank7 (Left Edge) 8 12 12 16 Bank8 (Right Edge) 0000 |
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