455A datasheet(36/148 Pages) RENESAS

36 / 148 page

Rev.1.01

Feb 15, 2008

Page 36 of 146

REJ03B0224-0101

455A Group

(3) Timer 1 (interrupt function)

Timer 1 is an 8-bit binary down counter with a timer 1 reload

reload register R1 with the T1AB instruction. Data can be read

from timer 1 with the TAB1 instruction.

Stop counting and then execute the T1AB or TAB1 instruction to

read or set timer 1 data.

When executing the TR1AB instruction to set data to reload

1 underflows.

Timer 1 starts counting after the following process;

(1) set data in timer 1

(2) set count source by bit 0 and 1 of register W1, and

(3) set the bit 2 of register W1 to “1.”

When a value set in reload register R1 is n, timer 1 divides the

count source signal by n + 1 (n = 0 to 255).

Once count is started, when timer 1 underflows (the next count

pulse is input after the contents of timer 1 becomes “0”), the

timer 1 interrupt request flag (T1F) is set to “1,” new data is

loaded from reload register R1, and count continues (auto-reload

function).

The INT pin input can be used as the start trigger for timer 1

count operation by setting “1” in bit 0 of interrupt control register

l1.

Also, in this time, the auto-stop function by timer 1 underflow

can be performed by setting the bit 3 of register W1 to “1.”

(4) Timer 2 (interrupt function)

Timer 2 is an 8-bit binary down counter with two timer 2 reload

and the reload register R2L with the T2AB instruction. Data can

be set in the reload register R2H with the T2HAB instruction.

The contents of reload register R2L set with the T2AB

instruction can be set to timer 2 again with the T2R2L

instruction. Data can be read from timer 2 with the TAB2

instruction.

Stop counting and then execute the T2AB or TAB2 instruction to

read or set timer 2 data.

When executing the T2HAB instruction to set data to reload

timer 2 underflows.

Timer 2 starts counting after the following process;

(1) set data in timer 2

(2) set count source by bit 0 of register W2, and

(3) set the bit 1 of register W2 to “1.”

When a value set in reload register R2L is n and R2H is m, timer

2 divides the count source signal by n + 1 or m + 1 (n = 0 to 255,

m = 0 to 255).

Once count is started, when timer 2 underflows (the next count

pulse is input after the contents of timer 2 becomes “0”), the

timer 2 interrupt request flag (T2F) is set to “1,” new data is

loaded from reload register R2L, and count continues (auto-

reload function).

When bit 3 of register W2 is set to “1”, timer 2 reloads data from

reload register R2L and R2H alternately each underflow.

Timer 2 generates the PWM signal (PWMOUT) of the “L”

interval set as reload register R2L, and the “H” interval set as

reload registerR2H. The PWM signal (PWMOUT) is output

from CNTR pin. When bit 2 of register W2 is set to “1” at this

time, the interval (PWM signal “H” interval) set to reload

period of count source.

In this case, when a value set in reload register R2H is m, timer 2

divides the count source signal by n + 1.5 (m = 1 to 255).

When this function is used, set “1” or more to reload register

R2H.

When bit 1 of register W4 is set to “1”, the PWM signal output to

CNTR pin is switched to valid/invalid each timer 1 underflow.

However, when timer 1 is stopped (bit 2 of register W1 is cleared

to “0”), this function is canceled.

Even when bit 1 of a register W2 is cleared to “0” in the “H”

interval of PWM signal, timer 2 does not stop until it next timer 2

underflow.

When clearing bit 1 of register W2 to “0” to stop timer 2, avoid a

timing when timer 2 underflows.

455A Datasheet(PDF) 36 Page - Renesas Technology Corp

455A Datasheet(HTML) 36 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL