SH7136 datasheet(120/1160 Pages) RENESAS

120 / 1160 page

Section 6 Interrupt Controller (INTC)

Rev. 2.00 Sep. 10, 2008 Page 94 of 1130

REJ09B0402-0200

Figure 6.1 shows a block diagram of the INTC.

IRQOUT

NMI

IRQ0

IRQ1

IRQ2

IRQ3

UBC

WDT

CMT

MTU2

A/D

SCI

MTU2S

POE

SSU

RCAN-ET

I2C2

(Interrupt request)

Input

control

Com-

parator

Interrupt

request

CPU

I3 I2 I1 I0

Bus

interface

IPRA, IPRD to IPRF,

IPRH to IPRM

DTCERA to

DTCERE

ICR0

IRQSR

IRQCR

Module bus

INTC

UBC:

User break controller

WDT:

Watchdog timer

CMT:

Compare match timer

SCI:

Serial communication interface

MTU2:

Multi-function timer pulse unit 2

MTU2S:

Multi-function timer pulse unit 2S

A/D:

A/D converter

POE:

Port output enable

DTC:

Data transfer controller

SSU:

Synchronous serial communication unit

RCAN-ET:Controller area network

I2C2:

I2C bus interface 2

ICR0:

Interrupt control register 0

IRQCR:

IRQ control register

IRQSR:

IRQ status register

IPRA, IPRD to IPRF,

IPRH to IPRM:

Interrupt priority registers A, D to F, and H to M

SR:

Status register

DTCERA to DTCERE: DTC enable registers A to E

IPR

[Legend]

DTC

Figure 6.1 Block Diagram of INTC

SH7136 Datasheet(PDF) 120 Page - Renesas Technology Corp

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