HD64F36034 datasheet(387/592 Pages) RENESAS

Part #	HD64F36034

Description	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

PDF	592 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 16 Synchronous Serial Communication Unit (SSU)

Rev. 4.00 Mar. 15, 2006 Page 355 of 556

REJ09B0026-0400

Bit

Bit Name

Initial

Value

R/W

Description

CKS2

CKS1

CKS0

R/W

Transfer clock rate select

Sets transfer clock rate (prescaler division ratio) when the

internal clock is selected.

000:

φ/256

001:

φ/128

010:

φ/64

011:

φ/32

100:

φ/16

101:

φ/8

110:

φ/4

111: Reserved

16.3.4

SS Enable Register (SSER)

SSER is a register that sets transmit enable, receive enable, and interrupt enable.

Bit

Bit Name

Initial

Value

R/W

Description

R/W

Transmit enable

When this bit is 1, transmit operation is enabled.

R/W

Receive enable

When this bit is 1, receive operation is enabled.

RSSTP

R/W

Receive single stop

When this bit is 1, receive operation is completed after

receiving one byte.

—

Reserved

This bit is always read as 0.

TEIE

R/W

Transmit End Interrupt Enable

When this bit is set to 1, a TEI interrupt request is

enabled.

TIE

R/W

Transmit Interrupt Enable

When this bit is set to 1, a TXI interrupt request is

enabled.

HD64F36034 Datasheet(PDF) 387 Page - Renesas Technology Corp

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