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HD64F36034 Datasheet(PDF) 243 Page - Renesas Technology Corp |
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HD64F36034 Datasheet(HTML) 243 Page - Renesas Technology Corp |
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243 / 592 page ![]() Section 12 Timer Z Rev. 4.00 Mar. 15, 2006 Page 211 of 556 REJ09B0026-0400 Table 12.7 Register Settings in Complementary PWM Mode Register Description TCNT_0 Initial setting of non-overlapped periods (non-overlapped periods are differences with TCNT_1) TCNT_1 Initial setting of H'0000 GRA_0 Sets (upper limit value – 1) of TCNT_0 GRB_0 Set a changing point of the PWM waveform output from pins FTIOB0 and FTIOD0. GRA_1 Set a changing point of the PWM waveform output from pins FTIOA1 and FTIOC1. GRB_1 Set a changing point of the PWM waveform output from pins FTIOB1 and FTIOD1. |
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