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HD64F36034 Datasheet(PDF) 247 Page - Renesas Technology Corp |
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HD64F36034 Datasheet(HTML) 247 Page - Renesas Technology Corp |
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247 / 592 page ![]() Section 12 Timer Z Rev. 4.00 Mar. 15, 2006 Page 215 of 556 REJ09B0026-0400 Figure 12.32 (1) and (2) show examples of PWM waveform output with 0% duty and 100% duty in complementary PWM mode (for one phase). • TPSC2 = TPSC1 = TPSC0 = 0 Set GRB_0 to H'0000 or a value equal to or more than GRA_0, and the waveform with a duty cycle of 0% and 100% can be output. When buffer operation is used together, the duty cycles can easily be changed, including the above settings, during operation. For details on buffer operation, see section 12.4.8, Buffer Operation. • Other than TPSC2 = TPSC1 = TPSC0 = 0 Set GRB_0 to satisfy the following expression: GRA_0 + 1 < GRB_0 < H'FFFF, and the waveform with a duty cycle of 0% and 100% can be output. For details on 0%- and 100%-duty cycle waveform output, see Setting GR Value in Complementary PWM Mode: C, Outputting a waveform with a duty cycle of 0% and 100% in section 12.4.7, Complementary PWM Mode. |
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