32186 datasheet(886/1032 Pages) RENESAS

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OSCILLATOR CIRCUIT

20-4

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

20.1 Oscillator Circuit

(1) XSTAT (XIN oscillation status) bit

• Conditions under which XSTAT bit is set to "1"

XSTAT bit is set to "1" upon detecting that XIN oscillation has stopped. When XIN remains at the same level

on the basis of threshold value for XIN Oscillation Stoppage Detection (3 BCLK periods up to 4 BCLK

periods), XIN oscillation is assumed to have stopped. When operating normally, XIN changes state ("H" or

"L") once every BCLK period.

• Conditions under which XSTAT bitis cleared to "0"

XSTAT is cleared to "0" by a system reset or by writing "0." If XSTAT bit is cleared at the same time it is set

in 1) above, the former has priority so that XSTAT bit is cleared. Writing "1" to XSTAT bit is ignored.

• Method for using XSTAT bit to detect XIN oscillation stoppage

Because internally contains a PLL, the internal clock remains active even when XIN oscillation has stopped.

By reading XSTAT bit without clearing it after exiting the reset state, it is possible to know whether XIN

has ever stopped since the reset signal was deasserted. Similarly, by reading XSTAT bit after clearing it

by writing 0, it is possible to know the current oscillating status of XIN. (However, there must be an

interval of at least 5 BCLK periods (20 CPU clock periods) between read and write.)

About possess when XSAT bit is set "1," clear XSTAT bit once (etc) pay extra attention before use.

Figure 20.1.3 Procedure for Setting XSTAT

Read XSTAT

(1) To know whether XIN oscillation has ever stopped after being reset

Write XSTAT = 0

(2) To know the current status of XIN oscillation

Wait for 20 CPU

clock periods or more

Read XSTAT

Wait before inspecting XSTAT

Note: • About possess when XSAT is set "1," clear XSTAT once (etc) pay extra attention before use.

32186 Datasheet(PDF) 886 Page - Renesas Technology Corp